|
马上注册,结交更多好友,享用更多功能,让你轻松玩转社区。
您需要 登录 才可以下载或查看,没有账号?注册
x
In this work, a simplified method for performing characterization of a standard cell is
presented. The method presented here is based on Synopsys models of cell delay and power
dissipation, in particular the linear delay model. This model is chosen as it allows rapid
characterization with a modest number of simulations, while still achieving acceptable accuracy.
Additionally, a guideline for developing standard cell libraries for use with Synopsys synthesis
and simulation tools and Cadence Placement-and-Routing tools is presented. A cell layout
library, built in accordance with the presented guidelines, was laid out, and a test chip, namely a
dual 4-bit counter, was built using the library to demonstrate the suitability of the method. |
|