dc warning 求助

兵临城下

Dc 综合warning:
The register 'c1c2_reg[2]' may not be optimally
implemented because of a lack of compatible components with correct clock/enable phase.

请问什么意思？ 求大大赐教

兵临城下

自己顶一下！

icfbicfb

没关系吧，就是没有perfect effect，

兵临城下

回复 3# icfbicfb


    谢谢关注啊；对流片没影响吧。

nianhai1212

OPT-1205 (warning) The register %s' may not be optimally
implemented because of a lack of compatible components with
correct clock/enable phase
DESCRIPTION
The initial sequential mapping step tries to match the desired reqister clock phase
exactly. When this matching fails due to a difference in clock phase, the mapper
will attempt to avoid building a register with an incorrect clock/enable phase. When
that happens, this warning is issued .
WHAT NEXT
If you want compile to initially build a register with the opposite clock/enable
phase, then you can use the variable compile automatic clock phase inference to
alter the way that mapping operates Setting this variable to "none" will instruct
the initial sequential mapping to ignore clock phase entirely during this process
thus allowing the mapper to consider registers with both positive and negative
clock/enable phase as needed. Setting this variable to "relaxed" will instruct
sequential mapping to only try the opposite phase device if there is no other way to
implement the register with the automatically inferred phase. And, setting the
variable to "strict" (the default setting) will instruct the initial sequential
mapping to reject all candidate components whose clock/enable phase does not match
the automatical1y inferred phase.