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发表于 2011-11-2 16:03:23
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The problem with attaching RLOC to a gate, even if the gate is instantiated rather than inferred, is that the mapper will not necessarily keep the gate by itself in the final design. Usually several gates can be lumped into a single LUT. The tools might have allowed an RLOC constraint on gates that don't get grouped together, but unfortunately they don't. If you have a combinatorial function that needs to end up with a particular placement, the only way is to instantiate a LUT instead of gates or gate primitives. |
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