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本帖最后由 hi_china59 于 2011-8-17 12:10 编辑
A Digital Frequency Modulator Based On A 200MHz Phase-Locked Loop
Table of Contents
1 Introduction 1
11 Motivation…………………………………………………………………………2
12 Organization………………………………………………………………………3
2 Background of Phase Locked Loops 4
21 Functions…………………………………………………………………………4
22 Phase Locked Loops Architectures………………………………………………6
221 Analog Phase Locked Loop………………………………………………6
222 Digital Phase Locked Loop…………………………………………………8
223 All Digital Phase Locked Loop……………………………………………10
23 Voltage Controlled Oscillator…………………………………………………10
24 The Charge Pump………………………………………………………………14
25 The Phase Frequency Detector………………………………………………14
26 Loop Filter……………………………………………………………………16
27 Summary……………………………………………………………………22
3 Circuit Design of 50MHz Low Jitter Phase-Locked Loop 23
31 Specification …………………………………………………………………23
32 System Design ………………………………………………………………24
33 Circuit Implementation…………………………………………………………26
34 Verifications and Simulations……………………………………………………30
35 Layout and Measurement………………………………………………………32
36 Summary…………………………………………………………………………40
4 Digital Frequency Modulator based on 200MHz PLL 41
41 Overview of Spread-Spectrum Clock Technology……………………………42
411 Background………………………………………………………………42
412 Theorem………………………………………………………………43
413 Types of Spread-Spectrum Clock Generator……………………………44
42 Application………………………………………………………………………46
43 Architecture and Algorithm………………………………………………………48
431 Architecture………………………………………………………………48
432 Algorithm…………………………………………………………………50
433 MATLAB variation………………………………………………………53
44 Circuit Implementation………………………………………………………57
411 Digital Frequency Modulator……………………………………………57
412 200MHz Phase Locked Loop……………………………………………60
45 Simulations and Layout…………………………………………………………62
46 Summary…………………………………………………………………………65
5 Conclusions 66
REFERENCE 68 |
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发表于 2011-8-16 14:58:59
