modelsim仿真

mmmomo

例子选用的是夏宇闻老师《Veriog数字系统设计教程》中第二部分第九讲中的RISC_CPU的例子，并在modelsim中实现前仿真。
在Quartus中进行相关设置，器件选用Cyclone的FPGA，全编译通过。在simulation\modelsim下（即生成的.vo文件和.sdo文件所在目录）建立modelsim工程和Cyclone仿真库，在工程中添加顶层测试文件和.vo文件，在Start Simulation对话框中加载Cyclone仿真库和.sdo文件，在Apply to Region中指定为测试文件名/例化实例名（本例为cputop/t_cpu），运行仿真，出现如下错误：
# Loading F:/CPU/simulation/modelsim/cpu_v.sdo
# ** Error: (vsim-SDF-3250) F:/CPU/simulation/modelsim/cpu_v.sdo(35): Failed to find INSTANCE '/cputop/t_cpu/m_machine|inc_pc~I/lecomb'.
# ** Error: (vsim-SDF-3250) F:/CPU/simulation/modelsim/cpu_v.sdo(51): Failed to find INSTANCE '/cputop/t_cpu/m_machine|inc_pc~I/lereg'.
# ** Error: (vsim-SDF-3250) F:/CPU/simulation/modelsim/cpu_v.sdo(67): Failed to find INSTANCE '/cputop/t_cpu/m_register|opc_iraddr[14]~I/lecomb'.
# ** Error: (vsim-SDF-3250) F:/CPU/simulation/modelsim/cpu_v.sdo(83): Failed to find INSTANCE '/cputop/t_cpu/m_register|opc_iraddr[14]~I/lereg'.
# ** Error: (vsim-SDF-3250) F:/CPU/simulation/modelsim/cpu_v.sdo(107): Failed to find INSTANCE '/cputop/t_cpu/m_register|opc_iraddr[13]~I/lecomb'.
# ** Warning: (vsim-SDF-3432) F:/CPU/simulation/modelsim/cpu_v.sdo: This file is probably applied to the wrong instance.
# Ignoring subsequent missing instances from this file.
# ** Warning: (vsim-SDF-3440) F:/CPU/simulation/modelsim/cpu_v.sdo: Failed to find any of the 214 instances from this file.
# ** Error: (vsim-SDF-3445) Failed to parse SDF file "F:/CPU/simulation/modelsim/cpu_v.sdo".
#    Time: 0 ps  Iteration: 0  Region: /cputop  File: F:/CPU/cputop.v
# Error loading design
小弟想请教一下：出现这种错误的原因是什么？如何处理这种错误？

faddist

表示u币懂啊

amodaman

在你的例子中，cputop/t_cpu 需要改成netlist中真实的instance 名，而不是用module 名。