Senior SerDes Analog IC Design Engineer-上海

annabelliu

Position: Senior SerDes Analog IC Design Engineer

Location: Shanghai, China

Position Description

Responsible for the design and development of SerDes analog/mixed signal IC circuit blocks from initial concept and specification through final verification and conformance to customer requirements.

Position Requirements

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Bachelor or master degree in Electronics Engineering and related majors, PHD is preferred.

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Minimum 5 years industry experience in CMOS SerDes IC design

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Experience in SerDes transceiver designs including some of the following circuit blocks: System level modeling by matlab, C, or VerilogA; Driver; Receiver; Serializer; Deserializer; Phase Interpolator; Low jitter PLL; High Speed Clock Distribution; Bias and Bandgap and Voltage Regulators.

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Good knowledge of a set of common SerDes standards and their electrical requirements, and a thorough understanding of jitter.

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Proficient in using CAD tools for circuit simulation, layout, and physical verification (Cadence tool experience, lab test experience, and experience at 65nm and below technologies are a plus).

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Good in problem solving and communication.

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Ability to work cooperatively in team environment.

Annabel hunter

MSN 和邮箱  goodmorningliujing@163.com

如果你感兴趣，我会及时和你沟通信息。

seanwang168

回复 1# annabelliu


    good!!