Analog Integrated Circuits and Signal Processing

jswon

Analog to digital converter for high density neural signal recording front-end in 90 nm                byMohammad Hossein Zarifi, Shahin Farshchi, Javad Frounchi
Abstract
High-fidelity recording of neural signals requires varying levels of signal gain to capture low-amplitude single-unit activity            in the presence of high-amplitude population activity. A floating-point approach has been used to widen the dynamic range            of analog-to-digital converters (ADC) designed for this application. In this paper we present an ADC, designed for multi-channel,            portable neural signal recording systems. To achieve low power consumption, small die area and wide dynamic range, an ADC            based on a time-based algorithm, combined with a floating-point pipelined structure has been designed and simulated. A conventional            variable-gain amplifier (VGA) stage has been eliminated in favor of a reference-current in a time-based ADC architecture.            The 12-b pipelined time-based floating-point ADC has been designed with a 7-b mantissa and an exponent that provides an additional            5 bits of dynamic range. The mantissa is determined by a uniform 7-b pipelined time-based analog to digital converter. The            ADC chip was designed and simulated in a 90 nm CMOS process, which occupies an active area of 360 μm × 550 μm, and consumes            7.8 μW at 1.2 V in full-scale conversion.         

Multimode Transmitters with ΔΣ-Based All-Digital RF Signal GenerationbyA. Frappé, A. Kaiser, A. Flament, B. Stefanelli

Abstract
This paper presents an all-digital approach to the generation of the modulated radio-frequency carrier and its application            to a multimode transmitter in today’s communication systems and draws a possible picture of tomorrow’s systems. We will first            analyze how digital transmitters will progressively replace their analog counterparts and what are the main issues associated            with this trend. The combination of Δ​Σ modulation and digital mixing is proposed as an innovative approach enabling multimode            operation of transmitters with low power consumption and chip area, easy configurability, and good performance. A 90 nm CMOS            chip has been designed to demonstrate the feasibility of the concept and its potential in multimode transmitter architectures.            Techniques such as redundant arithmetic and non-exact quantization are used in the high-speed Δ​Σ modulator implementation.            Furthermore, approaches to antenna filtering using BAW filters and reconfigurable semi-digital RF FIR filters will be introduced.            Finally, a review of recent outstanding transmitter designs will allow a comparison between the presented approach and architectures            based on digital-to-RF conversion.

baoergoued

非常感谢。。

蓝翔

看看。。

liuzhieetop

看看。。

hubbert04

回复 2# baoergoued


    Good

jingxin_xd

感谢分享！！！

QQben

谢谢分享

dannymu

谢谢

Caroline11

学习

cdting

Thanks!!!