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Abstract— This paper compares readout powers and operating
frequencies among dual-port SRAMs: an 8T SRAM, 10T
single-end SRAM, and 10T differential SRAM. The conventional
8T SRAM has the least transistor count, and is the most area
efficient. However, the readout power becomes large and the
cycle time increases due to peripheral circuits. The 10T
single-end SRAM is our proposed SRAM, in which a dedicated
inverter and transmission gate are appended as a single-end read
port. The readout power of the 10T single-end SRAM is reduced
by 75% and the operating frequency is increased by 95%, over
the 8T SRAM. On the other hand the 10T differential SRAM can
operate fastest, because its small differential voltage of 50 mV
achieves the high-speed operation. In terms of the power
efficiency, however, the sense amplifier and precharge circuits
lead to the power overhead. As a result, the 10T single-end
SRAM always consumes lowest readout power compared to the
8T and the 10T differential SRAM.
ICICDT08DPSRAM.pdf
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