大家开发FPGA用Verilog还是VHDL？

rx_78gp02a

同样功能的代码verilog的长度比vhdl短！

xiangql

看来本科的时候学习vhdl就是一个悲剧啊，我毕设还是用vhdl做的，不过读研之后用的全是verilog，vhdl现在也忘得差不多了

yuanpin318

I can use Verilog and VHDL, but prefer to Verilog. But company is in Euro and they prefer to VHDL since history. But now, they also accecpt Verilog. So normally, design is mixed language.

zbzxj0118

我用的是VHDL

飞跃疯人院

其实都差不多，不过verilog流行一些