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link以后,check_design的warning是:
Warning: In design 'shift', cell 'B_4' does not drive any nets. (LINT-1)
Warning: In design 'shift', cell 'B_5' does not drive any nets. (LINT-1)
Warning: In design 'shift', cell 'B_6' does not drive any nets. (LINT-1)
Warning: In design 'shift', cell 'B_7' does not drive any nets. (LINT-1)
Warning: In design 'shift', cell 'B_8' does not drive any nets. (LINT-1)
Warning: In design 'shift', cell 'B_9' does not drive any nets. (LINT-1)
link以后,未编译,直接输出的网表是,oZ[15:0]是输出,N20是综合工具自动增加的wire
GTECH_NOT I_3 ( .A(oZ[15]), .Z(N20) );
GTECH_BUF B_4 ( .A(oZ[15]) );
GTECH_BUF B_5 ( .A(N20) );
GTECH_BUF B_6 ( .A(oZ[15]) );
GTECH_BUF B_7 ( .A(N20) );
GTECH_BUF B_8 ( .A(oZ[15]) );
GTECH_BUF B_9 ( .A(N20) );
我要问的是DC综合工具为什么会插入这些重复的buffer(B_4到B_9),而且这些buf只是填了输入,而没有填输出,何解?
虚心求教。 |
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