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请教一下
APR长clock tree之后跑PT
hold time report的slack为负 (reoprt请参考下方)
原因是因为PT分析时
data path是走clock tree经FF i_core_m/i_rosc_trim/shi_dat_reg_1_ 的CK 到Q
再到目标FF i_core_m/i_rosc_trim/shi_dat_reg_2_ 的D
clock path则走一样的clock tree路径到目标FF i_core_m/i_rosc_trim/shi_dat_reg_2_ 的CK
PT把data path用minimux 条件去计算
而clock path用maximux 条件去计算
data path 和clock path都经过同样的clock tree路径
PT这样子分析的话clock tree越长则slack会越负
因为这样子的report有好几千个实在太多了
请问一下
有甚么方法或指令可以让PT不要吐出把这类型的report呢
谢谢
------------------------------------------------------------------
Startpoint: i_core_m/i_rosc_trim/shi_dat_reg_1_
(rising edge-triggered flip-flop clocked by gen_xtal_src_tmp_x)
Endpoint: i_core_m/i_rosc_trim/shi_dat_reg_2_
(rising edge-triggered flip-flop clocked by gen_xtal_src_tmp_x)
Path Group: gen_xtal_src_tmp_x
Path Type: min
Point Fanout Cap Trans Incr Path
----------------------------------------------------------------------------------------------
clock gen_xtal_src_tmp_x (rise edge) 0.00 0.00
clock clk_xtal (source latency) 0.00 0.00
uc_xtal_src/Y (BUFX4) 0.00 0.00 0.00 r
xtal_src (net) 1 0.01
i_core_m/i_clkmux/uc_xtal_src_tmp/B (MX2X4) 0.00 0.00 & 0.00 r
i_core_m/i_clkmux/uc_xtal_src_tmp/Y (MX2X4) (gclock source) 0.08 0.13 & 0.13 r
i_core_m/i_clkmux/xtal_src_tmp (net) 1 0.03
i_core_m/i_clkmux/CLKINVX8G2B1I1_1/A (CLKINVX8) 0.08 0.00 & 0.13 r
i_core_m/i_clkmux/CLKINVX8G2B1I1_1/Y (CLKINVX8) 0.22 0.13 & 0.26 f
.........................
.........................
.........................
i_core_m/i_rosc_trim/CLKBUFX1G3B1I2/A (CLKBUFX1) 0.12 0.00 & 2.12 r
i_core_m/i_rosc_trim/CLKBUFX1G3B1I2/Y (CLKBUFX1) 0.18 0.17 & 2.29 r
i_core_m/i_rosc_trim/xtal_in_G3B1I2ASTHNet419 (net) 3 0.02
i_core_m/i_rosc_trim/shi_dat_reg_1_/CK (DFFSHQX1) 0.18 0.00 & 2.29 r
i_core_m/i_rosc_trim/shi_dat_reg_1_/Q (DFFSHQX1) 0.17 0.28 & 2.57 f
i_core_m/i_rosc_trim/shi_dat[1] (net) 3 0.04
i_core_m/i_rosc_trim/U113/A (INVX2) 0.17 0.00 & 2.57 f
i_core_m/i_rosc_trim/U113/Y (INVX2) 0.14 0.10 & 2.68 r
i_core_m/i_rosc_trim/n46 (net) 3 0.03
i_core_m/i_rosc_trim/U44/B0 (OAI22XL) 0.14 0.00 & 2.68 r
i_core_m/i_rosc_trim/U44/Y (OAI22XL) 0.08 0.06 & 2.74 f
i_core_m/i_rosc_trim/n108 (net) 1 0.01
i_core_m/i_rosc_trim/shi_dat_reg_2_/D (DFFSHQX1) 0.08 0.00 & 2.74 f
data arrival time 2.74
clock gen_xtal_src_tmp_x (rise edge) 0.00 0.00
clock clk_xtal (source latency) 0.00 0.00
uc_xtal_src/Y (BUFX4) 0.00 0.00 0.00 r
xtal_src (net) 1 0.01
i_core_m/i_clkmux/uc_xtal_src_tmp/B (MX2X4) 0.00 0.00 & 0.00 r
i_core_m/i_clkmux/uc_xtal_src_tmp/Y (MX2X4) (gclock source) 0.15 0.25 & 0.25 r
i_core_m/i_clkmux/xtal_src_tmp (net) 1 0.03
i_core_m/i_clkmux/CLKINVX8G2B1I1_1/A (CLKINVX8) 0.15 0.00 & 0.25 r
i_core_m/i_clkmux/CLKINVX8G2B1I1_1/Y (CLKINVX8) 0.40 0.24 & 0.49 f
.........................
.........................
.........................
i_core_m/i_rosc_trim/CLKBUFX1G3B1I2/A (CLKBUFX1) 0.22 0.00 & 4.02 r
i_core_m/i_rosc_trim/CLKBUFX1G3B1I2/Y (CLKBUFX1) 0.32 0.33 & 4.36 r
i_core_m/i_rosc_trim/xtal_in_G3B1I2ASTHNet419 (net) 3 0.02
i_core_m/i_rosc_trim/shi_dat_reg_2_/CK (DFFSHQX1) 0.32 0.00 & 4.36 r
library hold time -0.09 4.27
data required time 4.27
----------------------------------------------------------------------------------------------
data required time 4.27
data arrival time -2.74
----------------------------------------------------------------------------------------------
slack (VIOLATED) -1.53 |
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