一个基准计数器的设计出现问题（急急急）

liangjianjun

这是程序主体：LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_unsigned.all;
USE ieee.std_logic_arith.all;

--  Entity Declaration
ENTITY mchangenew IS
-- {{ALTERA_IO_BEGIN}} DO NOT REMOVE THIS LINE!
PORT
(
  clk : IN STD_LOGIC;
  clr : IN STD_LOGIC;
  ld : IN STD_LOGIC;
  div : OUT STD_LOGIC;
  syn : OUT STD_LOGIC;
  m : IN integer range 0 to 17000;--STD_LOGIC_VECTOR(13 downto 0);
  q : buffer integer range 0 to 17000
);
-- {{ALTERA_IO_END}} DO NOT REMOVE THIS LINE!
END mchangenew;
--  Architecture Body
ARCHITECTURE mchangenew_architecture OF mchangenew IS

signal md:integer range 0 to 17000;--STD_LOGIC_VECTOR(13 downto 0);
--signal q_temp:STD_LOGIC_VECTOR(13 downto 0);
signal div_temp: STD_LOGIC;

BEGIN
process(clk ,clr, m)
  begin
   md<=m-1;
   if clr='1' then q<=0;
elsif clk' event and clk='1' then
    if ld='1'then    q<=md;
    end if;
    end if;
    end process;
   
process(q)

  begin
  if (q = md) then
    div_temp<='0';syn<='1';
    elsif q =0
    then div_temp<='1';
     end if;
   
--case q_temp is
-- when md =>div_temp<='0';syn<='1';
-- when "00000000000000" =>div_temp<='1';
-- when others=>div_temp<=div_temp;
-- end case;
  end process;
  
process(clk,div_temp)
  begin
if clk'event and clk='1'then
    if  div_temp<='1'then  q<=q+1;      
      else q<=q-1;
  end if;
  end if;
  end process;
div<=div_temp;
END mchangenew_architecture;

编译时老是出现：
[img]file:///D:/Program%20Files/Tencent/QQ/Users/359278903/Image/~W6GJ76@Z@_6_V[%60]@N7M2H.jpg[/img]

liangjianjun

Error (10028): Can't resolve multiple constant drivers for net "q[14]" at mchangenew.vhd(84)