[Paper]Design of a CMOS Operational Amplifier Amenable to Extremw Voltage Stress

gmc832002

Abstract

Extreme voltage stress (EVS) is an attractive burn-in technique employed in production test to weed out weak chips that may cause infant mortality. Application of this technique to analog integrated circuit (IC) has, however, only achieved limited success due to the significant irregularity in circuit topology. This paper examines the issue of design for EVS in analog IC and presents several analog circuit structures use of which enhances voltage stressability of analog circuits. Based on proposed circuit concepts an operational amplifier is designed in TSMC 0.18μm CMOS technology and is simulated with HSPICE. Simulation results have shown that the designed operational amplifier is fully stressable with slight performance degradation.

fanjx

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bwang

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asdfjkl

thanks a lot!

abab1394

好咚咚〉〉〉

tony_wu_ad

自己下载下来研究研究，呵呵

iyahsue

Frequency Compensation Techniques For Low-Power Operational Amplifiers

zhaimingjing88

呵呵
终于找到这个东东啦 好辛苦啊
谢谢 l z

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