请教ic compiler里面tie hi、tie LOW 线的链接

zzczx

warning： Cell contains tie connections which are not connected       to rea
l PG.
icc_shell> derive_pg_connection -power_net VDD -power_pin VDD -ground_net VS
S -ground_pin VSS -tie
begin derive_pg_connection...
-- reconnected total 0 tie highs and 0 tie lows
1

icc_shell> check_mv_design -power_nets
。。。。。。。。。。
Warning: Total 89 logical library cell(s) used in the design do not have pow
er/ground pins. (MV-597)
Power/Ground Connection Summary:
P/G net name                P/G pin count
--------------------------------------------------------------------
Unconnected power pins:           11268
Unconnected ground pins:          11268
--------------------------------------------------------------------
Warning: Power connection/checking is skipped for 22536 power pins because t
he required power pin information cannot be found in logical libraries. (MV-
510)
No Errors/Warnings Found.
----------------------------------------------------------------------------
----
       Supply Operating Voltage Checks
----------------------------------------------------------------------------
----
No Errors/Warnings Found.
Please review report above for warnings and errors.
1

foundry提供的library 就是这个了，好像也没有其他D的“ logical libraries    wi
th power pins.”
这个应该如何处理？谢谢

liuyangqwin2

回复 1# zzczx


    前辈 我也有设个问题   你的解决了吗   怎么解决的？？？

happypighaha

同问~

icfbicfb

derive_pg_connections -power_net VDD -ground_net VSS -tie  
成功以后，  

connect_tie_cells 就能加tie cell了

你是multi power domain的 tie off  cell是吧

love80238023

我也遇到过这个问题，4#的方法就可以解决，可以先连pin，然后-tie
derive_pg_connection -power_net VDD -power_pin VDD -ground_net VSS -ground_pin VSS
derive_pg_connections -power_net VDD -ground_net VSS -tie

xujiankunkun

大侠，我也遇到这个问题，试了#5的方法还是不行Checking [VSS]:
        There are no floating shapes
        ERROR: There are 306 floating pins
Checking [VDD]:
        There are no floating shapes
        ERROR: There are 306 floating pins
Checked 2 nets, 2 have Errors

lilyzhong

回复 4# icfbicfb

我用
drive_pg_connection -power_net VDD  -power_pin VDD\                                -power_net VSS  -power_pin VSS\
                                -tie
时，出现reconnect total 0 tie highs and 0 tie lows
后来分别用
drive_pg_connection -power_net VDD  -power_pin VDD\                                -power_net VSS  -power_pin VSS
drive_pg_connection -power_net VDD  \                                -power_net VSS  \

                                -tie
可以连到power port
但提示connect 0 ground port
check_mv_design -power_nets(我的不是多电源设计)也提示
power connection/checking is skipped for 28101 power pins because the required power pin information cannot be found in logical libraries
请问下怎么解决呢

小_蜜_蜂

回复 7# lilyzhong
也遇到了同样的问题，请教一下怎么解决呢，谢谢了！

lilyzhong

回复 8# 小_蜜_蜂


   能连上就可以了关于IO pad有时总提示P/G连不上，你到layout里看下确实连上了就行了
应该问题不大

小_蜜_蜂

回复 9# lilyzhong


   

好像不是pad没连上，提示说 missing pg pin in logical library ，不知道怎么解决，多谢了