看的好几篇低噪声的文章都说用lateral PNP做运放输入管和产生带隙基准,...白看了...接触到的工艺没一个有lateral PNP,不知道可不可以用deep N well vertical NPN代替...
In a digital CMOS n-well process, parasitic lateral pnp, lateral npn and vertical pnp transistors could be identified.
In addition to the advantages discussed above, the design is compatible with low-cost N-well CMOS processes. The circuituses PNP devices to create the and voltages in the reference core. Unlike the NPN transistors in [12] and [15], PNP transistors can be implemented as lateral devices in modern low cost N-well CMOS processes with p-type substrates [16].