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[资料] [ebook]Low-Power High-Level Synthesis for Nanoscale

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发表于 2009-12-28 10:45:51 | 显示全部楼层 |阅读模式

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[size=120%]Low-Power High-Level Synthesis for Nanoscale CMOS Circuits
By Saraju P. Mohanty, Nagarajan Ranganathan, Elias Kougianos, Priyardarsan Patra


  • Publisher:   Springer
  • Number Of Pages:   302
  • Publication Date:   2008-07-07
  • ISBN-10 / ASIN:   0387764739
  • ISBN-13 / EAN:   9780387764733


Product Description:

Low-Power High-Level Synthesis for Nanoscale CMOS Circuits
addresses the need for analysis, characterization, estimation, and optimization of the various forms of power dissipation in the presence of process variations of nano-CMOS technologies.  The authors show very large-scale integration (VLSI) researchers and engineers how to minimize the different types of power consumption of digital circuits. The material deals primarily with high-level (architectural or behavioral) energy dissipation because the behavioral level is not as highly abstracted as the system level nor is it as complex as the gate/transistor level.  At the behavioral level there is a balanced degree of freedom to explore power reduction mechanisms, the power reduction opportunities are greater, and it can cost-effectively help in investigating lower power design alternatives prior to actual circuit layout or silicon implementation. The book is a self-contained low-power, high-level synthesis text for Nanoscale VLSI design engineers and researchers. Each chapter has simple relevant examples for a better grasp of the principles presented. Several algorithms are given to provide a better understanding of the underlying concepts. The initial chapters deal with the basics of high-level synthesis, power dissipation mechanisms, and power estimation. In subsequent parts of the text, a detailed discussion of methodologies for the reduction of different types of power is presented including:
• Power Reduction Fundamentals
• Energy or Average Power Reduction
• Peak Power Reduction
• Transient Power Reduction
• Leakage Power Reduction
Low-Power High-Level Synthesis for Nanoscale CMOS Circuits provides a valuable resource for the design of low-power CMOS circuits

Low-Power High-Level Synthesis for Nanoscale CMOS Circuits.pdf

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发表于 2009-12-28 22:25:37 | 显示全部楼层
good, thanks.
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发表于 2009-12-28 22:28:29 | 显示全部楼层
good, thanks.
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发表于 2009-12-28 22:30:59 | 显示全部楼层
good, thanks.
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发表于 2009-12-28 22:33:26 | 显示全部楼层
good, thanks.
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发表于 2010-1-17 18:55:52 | 显示全部楼层
thanks al ot~~
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发表于 2010-2-2 14:04:49 | 显示全部楼层
thanks for sharing
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发表于 2010-3-1 20:40:00 | 显示全部楼层
thanks for sharing
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发表于 2010-5-8 11:35:32 | 显示全部楼层
相当的好啊
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发表于 2010-9-14 05:51:14 | 显示全部楼层
thanks very much!!!!!!!!!!!111
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