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[这个贴子最后由willing在 2004/06/30 11:30am 第 1 次编辑]
DSP通过WR 、RD和CS、地址总线、数据总线与FPGA进行接口,现在通过DSP读写FPGA的寄存器,有问题,请高手指点!
程序如下:
DSP程序:
ptr = SRAM_START;
Write_FPGA(SRAM_START,0x1);
ctrl_reg=Read_FPGA(ptr);
if (ctrl_reg==0x1)
printf("FPGA R/W Successful!\n");
else
printf("FPGA R/W failure!\n");
FPGA程序:
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
ENTITY DSP_Interface Is
port(
sys_clk : in std_logic;
--Signal from ADSP BF532
addr : in std_logic_vector(4 downto 0);
data : inout std_logic_vector(15 downto 0);
cs : in std_logic;
rd : in std_logic;
wr : in std_logic
);
--Register Address Setting
CONSTANT CTRL_WORD_ADDR : std_logic_vector(4 downto 0) := "00000"; --Control word address
End DSP_Interface;
Architecture bhv of DSP_Interface Is
signal reg : std_logic_vector(15 downto 0);
begin
process(wr)
begin
if wr'event and wr='1' then --posedge
if cs='0' then
if (addr=CTRL_WORD_ADDR) then
reg<=data;
end if;
end if;
end if;
end process;
process(rd)
begin
if rd'event and rd='1' then
if cs='0' then
if (addr=CTRL_WORD_ADDR) then
data<=reg;
end if;
end if;
end if;
end process;
End bhv;
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