【ESD FMEA宝典】ESD: Failure Mechanisms and Models by Voldman

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[size=120%]ESD: Failure Mechanisms and Models
By Dr. Steven H. Voldman

• Publisher:   Wiley
• Number Of Pages:   408
• Publication Date:   2009-09-15
• ISBN-10 / ASIN:   0470511370
• ISBN-13 / EAN:   9780470511374

Product Description:

Electrostatic discharge (ESD) failure mechanisms continue to impact semiconductor components and systems as technologies scale from micro- to nano-electronics.
This book studies electrical overstress, ESD, and latchup from a failure analysis and case-study approach. It provides a clear insight into the physics of failure from a generalist perspective, followed by investigation of failure mechanisms in specific technologies, circuits, and systems. The book is unique in covering both the failure mechanism and the practical solutions to fix the problem from either a technology or circuit methodology.
Look inside for extensive coverage on:

• failure analysis tools, EOS and ESD failure sources and failure models of semiconductor technology, and how to use failure analysis to design more robust semiconductor components and systems;
• electro-thermal models and technologies; the state-of-the-art technologies discussed include CMOS, BiCMOS, silicon on insulator (SOI), bipolar technology, high voltage CMOS (HVCMOS), RF CMOS, smart power,  gallium arsenide (GaAs), gallium nitride (GaN), magneto-resistive (MR) , giant magneto-resistors (GMR),  tunneling magneto-resistor (TMR),  devices; micro electro-mechanical (MEM) systems, and  photo-masks and reticles;
• practical methods to use failure analysis for the understanding of ESD circuit operation, temperature analysis, power distribution, ground rule development, internal bus distribution, current path analysis, quality metrics, (connecting the theoretical to the practical analysis);
• the failure of each key element of a technology from passives, active elements to the circuit, sub-system to package, highlighted by case studies of the elements, circuits and system-on-chip (SOC) in today’s  products.

ESD: Failure Mechanisms and Models is a continuation of the author’s series of books on ESD protection. It is an essential reference and a useful insight into the issues that confront modern technology as we enter the Nano-electronic era.

[ 本帖最后由 benemale 于 2009-8-2 00:06 编辑 ]

s2618017

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andyjackcao

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andyjackcao

System and IC level analysis ESD and EFT immunity and associatied
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TABLE OF CONTENTS
Page
PUBLICATION DISSERTATION OPTION.................................................................... iii
ABSTRACT ....................................................................................................................... iv
ACKNOWLEDGMENTS .................................................................................................. v
LIST OF ILLUSTRATIONS ............................................................................................. ix
LIST OF TABLES ........................................................................................................... xiii

SECTION
1. INTRODUCTION ....................................................................................................  1
PAPER ................................................................................................................................ 3
  1. CORRELATION BETWEEN EUT FAILURE LEVELS AND ESD
GENERATOR PARAMETERS .............................................................................. 3
    ABSTRACT ............................................................................................................... 3
  I. INTRODUCTION .................................................................................................. 4
    II. EUT FAILURE LEVELS ..................................................................................... 8
  III. MEASUREMENTS OF ESD PARAMETERS ................................................. 11
  A. Discharge Currents ..................................................................................... 11
  B. Induced Voltages in a Semi-Circular Loop ................................................ 12
  C. Electric Fields ............................................................................................. 18
    IV. Correlation analysis ........................................................................................... 18
A. Method ....................................................................................................... 19
  B. Extracting ESD Parameters ........................................................................ 19
  C. Frequency Selective Immunity of EUTs .................................................... 27
  D. Which Parameter Predicts the Failure Level the Best for All EUTs? ........ 31
  E. Limit of the Correlation Analysis ............................................................... 32
    V. Comparison between the Modified and the Unmodified ESD Generators ......... 33
  VI. Conclusion ......................................................................................................... 36
  APPENDIX .............................................................................................................. 37
  REFERENCES ........................................................................................................ 46
2. FREQUENCY DOMAIN MEASUREMENT METHOD FOR THE ANALYSIS
OF ESD GENERATORS AND COUPLING ........................................................ 49
       ABSTRACT ............................................................................................................. 49
  I. INTRODUCTION ................................................................................................ 50
  II. Methodology ....................................................................................................... 52
  A. Basic concept ............................................................................................. 52
B. Implementation........................................................................................... 53
  C. Verification of the methodology by SPICE simulation ............................. 58
   III. Measurement Results ......................................................................................... 61
  A. Time domain and frequency domain instrumentation ............................... 62
  B. Induced loop voltage measurement in frequency domain .......................... 64
  C. Measurements of the voltage induced on a trace on a mother board in the  
    frequency domain ....................................................................................... 66
   IV. Discussion – Limits of the Method .................................................................... 69
  A.  Linearity .................................................................................................... 69
  B. Equality of the excitation ........................................................................... 71
  C. Common mode currents flowing on the coaxial cable ............................... 72
  V. Conclusion .......................................................................................................... 73
  REFERENCES ........................................................................................................ 73


  3. A NON-LINEAR µ-CONTROLLER POWER DISTRIBUTION NETWORK
MODEL FOR CHARACTERIZATION OF IMMUNITY TO EFTS ................... 76
    ABSTRACT ............................................................................................................. 76
  I. INTRODUCTION ................................................................................................ 77
    II. PDN Model ......................................................................................................... 79
    III. Measurement of Model Parameters ................................................................... 80
A. Current Consumption ................................................................................. 80
  B. Inter-Power Domain Network .................................................................... 81
  C. ESD Protection Diodes .............................................................................. 83
  D. Lead Frame and Bond Wire ....................................................................... 83
  E. Complete Models........................................................................................ 85
  IV. Validation .......................................................................................................... 86
    V. Applications of the Model................................................................................... 91
  A. Internal Current Estimation for low level disturbance ............................... 91
  B. ESD power rail clamp evaluation for high level disturbance..................... 92
  VI. Conclusion ......................................................................................................... 96
  REFERENCES ........................................................................................................ 97
VITA   .............................................................................................................................. 100

lotusky

原帖由 andyjackcao 于 2009-8-2 00:18 发表

                               
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System and IC level analysis ESD and EFT immunity and associatied
也刚刚下载到
TABLE OF CONTENTS
Page
PUBLICATION DISSERTATION OPTION............................................................. ...

Title:	System and IC level analysis of electrostatic discharge (ESD) and electrical fast transient (EFT) immunity and associated coupling mechanisms
Alternate Title:	Correlation between EUT failure levels and ESD generator parameters. Frequency domain measurement method for the analysis of ESD generators and coupling. Non-linear [Greek character for mu]-controller power distribution network model for characterization of immunity to EFTS.
Author (s):	Koo, Ja Yong, 1970-
Advisor(s):	Pommerenke, David
Department/Lab Affiliations:	Electromagnetic Compatibility Laboratory
Issue Date:	2008
Publisher:	Missouri University of Science and Technology
Citation:	Koo, Jayong. "System and IC Level Analysis of Electrostatic Discharge (ESD) and Electrical Fast Transient (EFT) Immunity and Associated Coupling Mechanisms." Ph.D. Dissertation, Electrical Engineering, Missouri University of Science and Technology, 2008.
Abstract:	"The exposure of electronic circuits to lightning, electrostatic discharge (ESD), electrical fast transients (EFT) or sine wave signals can reveal RF immunity problems. Typical problems include temporary malfunctions or permanent damage of integrated circuits (ICs). In an effort to reproduce those disturbances, a series of electromagnetic compatibility standards has been developed. However, a complete understanding of the root cause of the immunity problems has yet to be established. This dissertation discusses immunity problems in three papers, starting at the system level, via the coupling path into the IC"--Abstract, p. iv.
Type:	Thesis/Dissertation text
Copyright Notice:	These materials are protected under copyright by the original author.

daojx

真是好人啊,谢谢

charlie11

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charlie11

thank you very much