xilinx ppc440 modelsim仿真问题请教

tatata

以下是我使用modelsim编译，加载设计的信息，在加载的过程中出现的错误，请大家帮分析分析是什么原因呀？
以.vhd文件加载的顺序有关吗？该如何纠错呀？

# Compile of ppc440_sim_init.vhd was successful.
# Compile of xps_intc_0_wrapper.vhd was successful.
# Compile of clock_generator_0_wrapper.vhd was successful.
# Compile of ddr2_sdram_dimm0_wrapper.v was successful.
# Compile of jtagppc_cntlr_0_wrapper.vhd was successful.
# Compile of orgate_1_wrapper.vhd was successful.
# Compile of plb_v46_0_wrapper.vhd was successful.
# Compile of ppc440_0_wrapper.vhd was successful.
# Compile of ppc440_sim.vhd was successful.
# Compile of ppc440_sim_init.vhd was successful.
# Compile of proc_sys_reset_0_wrapper.vhd was successful.
# Compile of rs232_uart_1_wrapper.vhd was successful.
# Compile of sysace_compactflash_wrapper.vhd was successful.
# Compile of xps_bram_if_cntlr_1_bram_wrapper.vhd was successful.
# Compile of xps_bram_if_cntlr_1_wrapper.vhd was successful.
# 14 compiles, 0 failed with no errors.
vsim -t ps -novopt work.ppc440_sim
# vsim -t ps -novopt work.ppc440_sim
# Loading e:\Xilinx\10.1\ISE\smartmodel\nt\installed_nt/lib/pcnt.lib/swiftpli_mti.dll
# Loading std.standard
# Loading ieee.std_logic_1164(body)
# Loading unisim.vcomponents
# Refreshing D:\ml510_pro\modelsim_test\simulation\behavioral\sim_proj\work.ppc440_sim(structure)
# -- Loading package standard
# -- Compiling architecture structure of ppc440_sim
# -- Loading package std_logic_1164
# -- Loading package vcomponents
# -- Loading entity ppc440_sim
# Loading work.ppc440_sim(structure)
# Refreshing D:\ml510_pro\modelsim_test\simulation\behavioral\sim_proj\work.ppc440_0_wrapper(structure)
# -- Loading package standard
# -- Compiling architecture structure of ppc440_0_wrapper
# -- Loading package std_logic_1164
# -- Loading package vcomponents
# -- Loading entity ppc440_0_wrapper
# Loading work.ppc440_0_wrapper(structure)
# ** Error: (vsim-13) Recompile ppc440_virtex5_v1_01_a.ppc440_virtex5 because unisim.vcomponents has changed.
# ** Error: (vsim-13) Recompile ppc440_virtex5_v1_01_a.ppc440_virtex5(structure) because unisim.vcomponents has changed.
# Load interrupted
# Error loading design

ahmad.reda2019

thank you very much