【Springer 2007】CMOS Current-Mode Circuits for Data Communications

eagle_tek · 发表于 2009-1-29 18:45:51

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部分目录
1. VOLTAGE-MODE VERSUS CURRENT-MODE : A CRITICAL
COMPARISON 1
1.1 Ideal Current-Mode Circuits 2
1.2 Topology Duality of Current-Mode Circuits 4
1.3 Characteristics of Current-Mode Circuits 6
1.3.1 Input and Output Impedances 6
1.3.2 Bandwidth 6
1.3.3 Slew Rate 7
1.3.4 Propagation Delay 9
1.3.5 Supply Voltage Sensitivity 9
1.3.6 ESD 11
1.4 Summary 12
2. DESIGN TECHNIQUES FOR CURRENT-MODE CIRCUITS 13
2.1 Basic Current Amplifiers 13
2.2 Output Impedance Boosting Techniques 15
2.2.1 Basic Cascodes 15
2.2.2 Regulated and Multi-Regulated Cascodes 17
2.2.3 Pseudo-Cascodes 18
2.2.4 Low-Voltage Cascodes 19
2.3 Input-Impedance Reduction Techniques 20
2.3.1 Input-Capacitance Reduction 20
2.3.2 Active Feedback 21
2.3.3 Bootstrapping 21
2.4 Mismatch Compensation Techniques 22
2.5 Power Reduction Techniques 25
2.6 Bandwidth Enhancement Techniques 26
2.6.1 Resistor Series Peaking 27
2.6.2 Inductor Series Peaking 28
2.6.3 Current Feedback 31
2.7 Dynamic Range Improvement Techniques 32
2.8 Active Inductors 34
2.8.1 Topologies of Active Inductors 35
2.8.2 Noise of Active Inductors 43
2.8.3 Dynamic Range 47
2.9 Summary 47
3. WIRE CHANNELS 49
3.1 Resistances 50
3.2 Capacitances 54
3.3 Inductances 55
3.4 ModeHng of Wire Channels 59
3.4.1 Lumped RC Model 59
3.4.2 Distributed RC Model 60
3.4.3 Elmore Model 61
3.4.4 Transmission-Line Model 62
3.5 Transmission Line Effects 66
3.6 Termination Schemes 71
3.6.1 Series Termination 72
3.6.2 Parallel Termination 74
3.6.3 Parallel AC Termination 74
3.6.4 Thevenin Termination 75
3.7 Broadband Impedance Matching Networks 75
3.7.1 Passive Impedance Matching 75
3.7.2 Active Impedance Matching 75
3.8 Summary 79
4. ELECTRICAL SIGNALING
FOR HIGH-SPEED DATA LINKS 81
4.1 Voltage-Mode Signaling versus Current-Mode Signaling -
A Comparison 81
4.2 Voltage-Mode Signaling 84

[ 本帖最后由 eagle_tek 于 2009-1-29 18:47 编辑 ]