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Preface xi
xiii
1. INTRODUCTION TO LOW-POWER DIGITAL
INTEGRATED CIRCUIT DESIGN 1
1.1
1
1.1.1 Fundamental CMOS Scaling Strategies 5
1.1.2 Leakage Currents in Modern MOS Transistors 8
1.1.3 Transistor Scaling in the Deep Sub-Micron Regime 16
1.2 Classic Low-Power Strategies 18
1.3Low-Power Strategies beyond the Quarter Micron Technology node
19
2. LOGIC WITH MULTIPLE SUPPLY VOLTAGES 23
2.1 Principle of Multiple Supply Voltages 23
2.2 Power Saving Capability and Voltage Assignment 25
2.2.1 Supply Voltage Assignment Algorithm 28
2.2.1.1 Extended Clustered Voltage Scaling 32
2.3 Level Conversion in Multi-VDD Circuits 33
2.3.1 Asynchronous Level-Shifter Design 34
2.3.2 Design of Level-Shifter FlipFlops 38
2.3.3 Level Conversion in Dynamic Circuits 42
2.4 Dynamic Voltage Scaling (DVS) 43
3. LOGIC WITH MULTIPLE THRESHOLD
VOLTAGES 49
3.1 Principle of Multiple Threshold Voltages 49
4. FORCING OF TRANSISTOR STACKS
5. POWER GATING |
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发表于 2009-1-9 21:24:15
