DSP/Processor 相关 的书-PartI

chamot

VLIW Microprocessor Hardware Design - For ASIC and FPGA - Aug 2007(McGraw-Hill)

Chapter 1. Introduction 1
1.1 Types of Microprocessors 3
1.2 Types of Microprocessor Architecture 3
Chapter 2. Design Methodology 9
2.1 Technical Specification 9
2.1.1 Instruction Set of VLIW Microprocessor 11
2.1.2 Definition of Opcode for VLIW Instruction Set 13
2.1.3 Definition of VLIW Instruction 18
2.2 Architectural Specification 19
2.3 Microarchitecture Specification 23
Chapter 3. RTL Coding,Testbenching, and Simulation 33
3.1 Coding Rules 34
3.2 RTL Coding 46
3.2.1 Module fetch RTL Code 46
3.2.2 Module decode RTL Code 59
3.2.3 Module register file RTL Code 69
3.2.4 Module execute RTL Code 83
3.2.5 Module writeback RTL Code 138
3.2.6 Module vliwtop RTL Code 143
3.3 Testbenches and Simulation 147
3.3.1 Creating and Using a Testplan 148
3.3.2 Code Coverage 148
3.4 Synthesis 151
3.4.1 Standard Cell Library 152
3.4.2 Design Constraints 156
3.4.3 Synthesis Tweaks 157
3.5 Formal Verification 159
3.6 Pre-layout Static Timing Analysis 159
3.7 Layout 162
3.7.1 Manual/Custom Layout 163
3.7.2 Semi-custom/Auto Layout 164
3.7.3 Auto Place and Route 164
3.8 DRC / LVS 165
3.9 RC Extraction 166
3.10 Post-layout Logic Verification 166
3.11 Post-layout Performance Verification 167
3.12 Tapeout 167
3.13 Linking Front End and Back End 168
3.14 Power Consumption 171
3.15 ASIC Design Testability 172
Chapter 4. FPGA Implementation 175
4.1 FPGA Versus ASIC 175
4.2 FPGA Design Methodology 176
4.3 Testing FPGA 177
4.4 Structured ASIC

[ 本帖最后由 chamot 于 2008-7-27 22:58 编辑 ]

mimosa2000

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jaco.yang

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Avalon

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smh_42003

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kiokyy

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wolfzou

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kevinwjs

3q

risccpu

Thanks!