Digital Clocks for Synchronization and Communications

frankppk

Digital Clocks for
Synchronization and Communications
Masami Kihara
Sadayasu Ono
Pekka Eskelinen

Contents
Preface xv
1 Introduction to Clocks 1
1.1 Clocks in Digital Systems 1
1.2 Synchronization in Systems and Networks 2
1.3 Clock Frequency Synchronization Technology 3
1.4 Clock Generation Technology 3
References 4
2 Basics of Clock Synchronization and Generation 5
2.1 The General Concept of Synchronization 5
2.2 Clock Synchronization 6
2.2.1 Frequency Synchronization 7
2.2.2 Phase Synchronization 7
2.3 Clock Frequency Generation 8
2.4 Trends in Phase Synchronization and Clock Generation 9
vii
3 Signal Processing Fundamentals 11
3.1 Signal Processing and Systems 11
3.1.1 Signal Processing 11
3.1.2 Linear System 12
3.1.3 Fourier Transform 12
3.2 Digital Signal Processing 13
3.2.1 Digital System 13
3.2.2 Analog and Digital Signals 14
3.2.3 Spectrum 17
3.2.4 Method of Calculating DFT 18
3.2.5 Description of Signals and Systems in the Frequency
Domain 19
3.2.6 Laplace Transform 19
3.2.7 z-transform 21
3.2.8 Fundamental Property 22
3.2.9 Spectrum Estimation 22
3.3 Digital Filters 24
3.3.1 What Is a Digital Filter? 24
3.3.2 Linear Digital Filter 25
3.3.3 Design Methods for Digital Filters 26
3.3.4 Key Points in Designing a Digital Filter 27
References 28
4 Introduction to PLLs 29
4.1 Basic Mechanisms in Phase Synchronization 29
4.2 Element Operation 30
4.2.1 Phase Comparator Characteristics 30
4.2.2 Controlled Oscillator Characteristics 32
4.2.3 Filter Characteristics 33
4.3 Classification of PLLs 34
4.3.1 Analog PLL 35
4.3.2 Analog-Digital PLL 36
viii Digital Clocks for Synchronization and Communications
4.3.3 Digital PLL 36
4.3.4 Digital Processing PLL 36
4.4 PLL Applications 37
4.4.1 Synthesizer 37
4.4.2 Filter (Resonator) 38
4.4.3 Demodulator 38
4.4.4 Automatic Control System 39
4.5 PLL Characteristics 40
4.5.1 Cycle Slip 40
4.5.2 Influence of External Disturbances on Synchronization 40
4.5.3 Loop Gain 44
4.5.4 Lowpass Characteristics 46
4.5.5 Steady-State Phase Error 47
4.5.6 Synchronization Ranges 49
Reference 50
5 PLL Characteristic Analysis 51
5.1 Basic Analysis of PLL Characteristics 51
5.1.1 Issues Related to the Output Frequency 51
5.1.2 Relationship Between Frequency and Phase 53
5.1.3 Relation Based on the Input and Output Phase
Difference 54
5.2 Basic Characteristics 55
5.2.1 Transfer Function 55
5.2.2 Steady-State Phase Error 56
5.2.3 Synchronization Range 57
5.3 Transfer Function and Response Characteristic of the
First-Order Loop PLL 61
5.3.1 Transfer Function in an Analog Circuit 61
5.3.2 Transfer Function in Digital PLLs 62
5.3.3 Phase and Frequency Response of the First-Order Loop 66
5.4 Transfer Function and Second-Order Loop Response 69
Contents ix
5.4.1 Transfer Function in Analog PLLs 69
5.4.2 Transfer Function in Digital PLLs 72
5.4.3 Phase and Frequency Response of a Second-
Order Loop 75
References 79
6 Simulation of a Digital PLL 81
6.1 Transfer Function Analysis 81
6.2 Transient Response Simulation 82
6.3 Steady-State Phase Error Simulation 85
6.3.1 Simulating the Steady-State Phase Error of a First-
Order Loop 86
6.3.2 Simulating the Steady-State Phase Error of a Second-
Order Loop 87
Reference 88
7 Clock Systems in Networks 89
7.1 Wired Systems 89
7.1.1 Clocks in Digital Systems 89
7.1.2 Clocks in Transmission Systems 90
7.1.3 Clock System for Network Synchronization 93
7.1.4 Clock System Across Multiple Links 95
7.2 Wireless Systems 96
7.2.1 The Effects of Network Topologies on Clock and
Frequency Synchronization 96
7.2.2 Synchronization and Frequency Control Arrangements
for Radio Networks 101
References 104
8 Digital Synchronization System Design 107
8.1 Basic Design 107
8.2 Basic Configuration 108
x Digital Clocks for Synchronization and Communications
8.3 DCO Design 108
8.3.1 Oscillators and Their Selection 108
8.3.2 Digital Control System 110
8.4 Digital Processing Phase Comparator 111
8.5 Digital Control 111
8.5.1 Gain Adjustment in the Phase Comparator 111
8.5.2 Gain Adjustment in the Controlled Oscillator 113
8.6 Frequency Range of the Controlled Oscillator 116
8.7 Time Constant and Synchronization Range 120
8.8 Loop Filter Configuration and Transfer Function 122
8.9 Noise Performance 124
8.9.1 Jitter Accumulation in Digital PLLs 124
8.9.2 Short-Term Frequency Stability of a PLL 125
8.9.3 Noise Influence on the PLL Transfer Function 126
8.9.4 Optimum Time Constant 127
8.10 Actions Against Input Signal Problems 130
8.10.1 Input Phase Jump 130
8.10.2 Frequency Holdover 132
References 132
9 PLL LSI 135
9.1 PLL in Transmission Interfaces 135
9.2 Basic Configuration of Transmission Clock Recovery
Circuit 135
9.3 Signal Receiving and Regeneration Circuit Using PLL 136
9.3.1 PLL Input Signal 136
9.3.2 Phase and Frequency Comparison Circuits 138
9.3.3 Frequency Holding Function 139
9.3.4 Expansion of Synchronization Range 139
9.4 CDR Based on the PLL 140
Contents xi
9.5 Transmission Clock Generation Circuit 140
9.6 PLL Circuits in Wireless Systems 141
References 143
10 Frequency Generation Systems 145
10.1 The Need for Frequency Generation 145
10.2 The Evolution of Frequency Synchronization and
Generation Systems 145
10.3 Ideal Clock Generation Using Digital Signal
Processing 146
10.4 DDS Characteristics 148
References 149
11 DDS Circuit Configuration and Characteristics 151
11.1 Basic Parameters 151
11.1.1 Output Frequency 151
11.1.2 Frequency Control Resolution 155
11.2 Spectrum 156
11.2.1 Adder Output Waveform 158
11.2.2 Phase Error Due to Binary Width Limitation in the
Sine Wave Conversion Part 160
11.2.3 Spectrum of the Sine Wave Conversion Part 163
11.2.4 Spectrum in the DAC Output 167
11.2.5 Output Filter 170
11.3 New Design Methodology 172
11.3.1 Spurious Component Reduction 172
11.3.2 Circuit Scale Reduction 174
References 177
12 Some DDS Applications 179
12.1 DDS Trends 179
xii Digital Clocks for Synchronization and Communications
12.2 Synthesizer 179
12.3 Combination of DDS and PLL 180
12.4 Atomic Frequency Standards 182
12.5 DDS Circuits in Wireless Systems 183
References 184
13 Noise in Clocks 185
13.1 Frequency Stability and Noise 185
13.2 Relationship Between Sine Wave and Noise 185
13.2.1 Noise in the Frequency Domain 185
13.2.2 Noise in Time Domain 186
13.3 Noise Processing 188
13.3.1 Noise Characteristics in PLL 188
13.3.2 Noise in Frequency Conversion 189
13.3.3 Noise Power 191
13.4 Phase Noise and Frequency Noise 192
13.5 Frequency Components of Noise 194
13.6 Other Measures for Spectrum Analysis 197
13.7 Variance and Power Spectral Density 199
13.7.1 Sample Variance 199
13.7.2 Sample Variance and Power Spectral Density 200
References 202
14 Noise Measurement 203
14.1 Variance Measurement in the Time Domain 203
14.1.1 Measurement of the Two-Sample Variance with a
Frequency Counter 203
14.1.2 Two-Sample Measurement with a Time Interval
Counter 207
Contents xiii
14.2 Spectrum Measurement in the Frequency Domain 210
14.2.1 Direct Measurement of Frequency Spectrum 210
14.2.2 Phase Synchronization Method for Phase Noise
Frequency Spectrum 211
Reference 213
15 Operational and Environmental Effects on
Performance Characteristics 215
15.1 Performance Characteristics in Wired Transmission
Systems 215
15.1.1 Network Configurations 215
15.1.2 Relationship Between System and Synchronization
Characteristics 216
15.1.3 Wired Transmission Characteristics 219
15.1.4 Synchronization Characteristics 221
15.2 Performance Characteristics in Radio Systems 221
15.2.1 Some Characteristics of the Air Interface Regarding
Synchronization 222
15.2.2 External Effects on Terminal Clock Generation 229
References 234
Appendix
Units Related to PLL Design 235
A.1 Units in the Basic Equation 235
A.2 Units in the Transfer Function 236
A.3 Units in Digital PLLs 237
About the Authors 239
Index 241
xiv Digital Clocks for Synchronization and Communications
Preface
It was not until the 1970s that digital systems were first used for large-scale
telecommunication networking. Performance enhancements since then have
been strongly tied to advances in synchronization technology. Modern digital
data transmission cannot work without clocks. Their rhythm—or oscillator
frequency—controls the operation of devices and components, and thus
it must be distributed throughout networks and shared by systems. Current
communication arrangements such as different synchronous digital hierarchy
(SDH)-based variants have the advantage of inherently sharing the same
clock. In practice, high quality clocks are indispensable, as they simplify
operational concepts and enhance the service level observed by the
customers.
The key parameter of a clock is its frequency. Digital communication is
likely to fail if this fundamental attribute is transferred or generated without
regard to its purity. When designing a network, the time domain stability
and spectral purity of the synchronization signal have to be assured for all
network elements and components. A basic telecom clock system involves
both synchronization and signal generation tasks. This book examines the
use of various phase-locked loop (PLL) techniques for clock synchronization
and the direct digital synthesizer (DDS) concept for clock generation.
Although there are many ways of constructing and arranging clock assemblies,
the fundamental issue is achieving adequate signal characteristics. The
goal of this book is to show how this can be achieved.
xv

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