［80信元悬赏］寻高手帮忙解决vcs_vC-2009.06运行出错的问题

happy_2009

我在ubuntu上装了vcs_vC-2009.06，但运行时候出错，没有波形文件也没有任何.v中应打印出来的信息～

运行过程中，产生的提示信息如下：

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Command: vcs -f ./../scr/asynFIFO.f +notimingcheck +nospecify +v2k -debug_all -l \
./../logs/compile.log -Mdir=./DATA -P /home/microe/data/program/eda_linux/debussy/debussy-52v15-basic/share/PLI/vcs/LINUX/debussy.tab \
/home/microe/data/program/eda_linux/debussy/debussy-52v15-basic/share/PLI/vcs/LINUX/pli.a \
-ucli -l ./../logs/asynFIFO.vcs.log
                         Chronologic VCS (TM)
            Version C-2009.06 -- Sat Jan 30 13:25:55 2010
               Copyright (c) 1991-2008 by Synopsys Inc.
                         ALL RIGHTS RESERVED

This program is proprietary and confidential information of Synopsys Inc.
and may be used and disclosed only as authorized in a license agreement
controlling such use and disclosure.


Warning-[ILLGO] Invalid option used
  Invalid option '-2001' must be ignored.
  Please check vcs -help for supported options.

Parsing design file '/home/microe/data/digital/asynFIFO/src/asynFIFO.v'
Parsing design file '/home/microe/data/digital/asynFIFO/src/asynFIFO_ctrl.v'
Parsing design file '/home/microe/data/digital/asynFIFO/src/asynFIFO_tbw.v'
Parsing design file '/home/microe/data/digital/asynFIFO/src/bcd2gray.v'
Parsing design file '/home/microe/data/digital/asynFIFO/src/dpram.v'
Parsing design file '/home/microe/data/digital/asynFIFO/src/gray2bcd.v'
Top Level Modules:
       asynFIFO_tbw
No TimeScale specified
Starting vcs inline pass...
1 module and 0 UDP read.
recompiling module asynFIFO_tbw because:
    This module or some inlined child module(s) has/have been modified.
make[1]: Entering directory `/home/microe/data/digital/asynFIFO/sim/DATA'
gcc  -pipe -O -I/home/microe/data/program/eda_linux/synopsys/vcs/vcs_vC-2009.06_common/vcs/include \
-c -o rmapats.o rmapats.c
if [ -x /home/microe/data/digital/asynFIFO/sim/simv ]; then chmod -x /home/microe/data/digital/asynFIFO/sim/simv; \
fi
g++  -o /home/microe/data/digital/asynFIFO/sim/simv  5NrI_d.o 5NrIB_d.o 95pg_1_d.o \
rmapats_mop.o rmapats.o SIM_l.o   /home/microe/data/program/eda_linux/synopsys/vcs/vcs_vC-2009.06_common/vcs/linux/lib/libvirsim.a \
/home/microe/data/program/eda_linux/synopsys/vcs/vcs_vC-2009.06_common/vcs/linux/lib/librterrorinf.so \
/home/microe/data/program/eda_linux/synopsys/vcs/vcs_vC-2009.06_common/vcs/linux/lib/libsnpsmalloc.so \
/home/microe/data/program/eda_linux/debussy/debussy-52v15-basic/share/PLI/vcs/LINUX/pli.a \
/home/microe/data/program/eda_linux/synopsys/vcs/vcs_vC-2009.06_common/vcs/linux/lib/libvcsnew.so \
/home/microe/data/program/eda_linux/synopsys/vcs/vcs_vC-2009.06_common/vcs/linux/lib/vcs_save_restore_new.o \
/home/microe/data/program/eda_linux/synopsys/vcs/vcs_vC-2009.06_common/vcs/linux/lib/ctype-stubs_32.a \
-ldl -lm -lm  -lc -lpthread -ldl   
/home/microe/data/digital/asynFIFO/sim/simv up to date
make[1]: Leaving directory `/home/microe/data/digital/asynFIFO/sim/DATA'


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xcykii

“当然，在公司的运行指令与上面的有点点区别，就多了一个./simv“这个是运行啊，之前的都是编译。vcs编译生成simv文件，然后运行simv这两个步骤

wqs1983

长长见识！向大侠们学习一下啊！

wqs1983

长长见识！向大侠们学习一下啊！

wqs1983

长长见识！向大侠们学习一下啊！

wqs1983

长长见识！向大侠们学习一下啊！

wqs1983

长长见识！向大侠们学习一下啊！

wqs1983

长长见识！向大侠们学习一下啊！

wqs1983

长长见识！向大侠们学习一下啊！

wqs1983

长长见识！向大侠们学习一下啊！

wqs1983

长长见识！向大侠们学习一下啊！