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- `timescale 1ns/1ps
- `include "/multiplication.v"
- module test;
- reg clk;
- reg [3:0] A,B;
- wire [7:0] C =0;
- multiplication4_4 m1(A,B,C,clk);
- always
- #10 clk = ~clk;
- initial
- begin
- clk = 1'b0;
- A = 4'b1111;
- B = 4'b0000;
- #200 B = 4'b0001;
- #200 B = 4'b0010;
- #200 B = 4'b0100;
- #200 B = 4'b1000;
- end
- initial begin
- $fsdbDumpfile("tb.fsdb");
- $fsdbDumpvars();
- end
- initial #1000 $finish;
- endmodule
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