Advanced ASIC Chip Synthesis 2nd

cfriend

Advanced ASIC Chip Synthesis
This title posted before as follows: hxxp://www.edaboard.com/viewtopic.php?t=73639&highlight=advanced+asic+chip+synthesis
However, the previous posted copy is 1st Edition (1999) and it's a scanned document.

The one posted below is 2nd Edition (2002). It has 13 chapters compared to 12 chapters in 1st edtion version. More importantly, it's in PDF format and the text is editable. Besides, the total size of the compressed document is much smaller (only 3.88MB) compared to the previous posted copy that took about 10MB.

Title: Advanced ASIC Chip Synthesis : Using Synopsys Design Compiler, Physical Compiler, and PrimeTime
Author: Bhatnagar, Himanshu
Edition: 2nd Edition
Publication: Kluwer Academic Publishers (2002)
ISBN: 0792376447
Format: PDF format, text editable

Description
Advanced ASIC Chip Synthesis: Using Synopsys? Design Compiler? Physical Compiler? and PrimeTime?, Second Edition describes the advanced concepts and techniques used towards ASIC chip synthesis, physical synthesis, formal verification and static timing analysis, using the Synopsys suite of tools. In addition, the entire ASIC design flow methodology targeted for VDSM (Very-Deep-Sub-Micron) technologies is covered in detail.

The emphasis of this book is on real-time application of Synopsys tools, used to combat various problems seen at VDSM geometries. Readers will be exposed to an effective design methodology for handling complex, sub-micron ASIC designs. Significance is placed on HDL coding styles, synthesis and optimization, dynamic simulation, formal verification, DFT scan insertion, links to layout, physical synthesis, and static timing analysis. At each step, problems related to each phase of the design flow are identified, with solutions and work-around described in detail. In addition, crucial issues related to layout, which includes clock tree synthesis and back-end integration (links to layout) are also discussed at length. Furthermore, the book contains in-depth discussions on the basis of Synopsys technology libraries and HDL coding styles, targeted towards optimal synthesis solution.

Target audiences for this book are practicing ASIC design engineers and masters level students undertaking advanced VLSI courses on ASIC chip design and DFT techniques.

Table of Contents
Foreword
Preface
Acknowledgements
About the Author
1. ASIC Design Methodology
2. Tutorial
3. Basic Concepts
4. Synopsis Technology Library
5. Partitioning and Coding Styles
6. Constraining Designs
7. Optimizing Designs
8. Design for Test
9. Links to Layout & Post Layout Opt
10. Physical Synthesis
11. SDF Generation
12. Primetime Basics
13. Static Timing Analysis
Appendix A
Appendix B
Index


DownloadLink: http://rapidshare.com/files/73250885/Advanced.ASIC.Chip.Synthesis.2nd.Edition.rar

cfriend

清晰版，不是扫描的
免费下载

liubo4068206

下不来啊.为什么啊?

LAS.xs

how to download？

cfriend

不要使用下载工具，直接点击下载

pradeepmadhava1

Useful resource

MasonCheng

回复 1# cfriend

Many thanks for sharing

chungchan

Superb share

daissy

连接好像失效了