VHDL Coding Styles and Methodologies

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VHDL Coding Styles and Methodologies
by: Ben Cohen

                               
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VHDL Coding Styles and Methodologies
By Ben Cohen

Publisher:   Springer
Number Of Pages:   480
Publication Date:   1999-03-31
ISBN-10 / ASIN:   0792384741
ISBN-13 / EAN:   9780792384748

Product Description:
VHDL Coding Styles and Methodologies, Second Edition is a follow-up book to the first edition of the same book and to VHDL Answers to Frequently Asked Questions, first and second editions. This book was originally written as a teaching tool for a VHDL training course. The author began writing the book because he could not find a practical and easy-to-read book that gave in-depth coverage of both the language and coding methodologies. This new edition provides practical information on reusable software methodologies for the design of bus functional models for testbenches. It also provides guidelines in the use of VHDL for synthesis. All VHDL code described in the book is on a companion CD, which also includes the GNU toolsite with EMACS language-sensitive editor (with VHDL, Verilog, and other language templates), and TSHELL tools that emulate a Unix shell. Model Technology graciously included an evaluation version of ModelSim, a recognized industry standard VHDL/Verilog compiler and simulator that supports easy viewing of the models under analysis, along with many debug features. In addition, Synplicity is kindly making available an evaluation version of Synplify, a very efficient, user-friendly and easy-to-use FPGA synthesis tool. Synplify provides a user with both the RTL and gate-level views of the synthesized model, and a performance report of the design. Optimization mechanisms are provided in the tool. VHDL Coding Styles and Methodologies, Second Edition is intended for professional engineers as well as students. It is organized in thirteen chapters, each covering a separate aspect of the language, with complete examples. It provides a practical approach to learning VHDL. Combining methodologies and coding styles, along with VHDL rules, leads the reader in the right direction from the beginning. CD INCLUDED VHDL Coding Styles and Methodologies, Second Edition includes a CD that contains + All code included in the book + GNU EMACS language-sensitive editor with VHDL, Verilog, and templates for other languages + GNU TSHELL tools that emulate Unix shell + Thirty-day evaluation of ModelSim VHDL compiler/simulator from Model Technology + Twenty-day evaluation of Synplify VHDL/Verilog FPGA synthesizer from Synplicity + VHDL template demonstrating the language syntax + VHDL '87 and VHDL '93 formal syntax in HTML format.


Summary: Very Difficult to Read
Rating: 3
As the title said, this book has a lot of good examples on how to write VHDL code with good coding styles. Most of the good coding style tips in the book make sense and I use it in my work. However, I don't think this is a good book to learn VHDL. The syntax is explained in the same style as the VHDL Language Reference Manual, which is very dry. For example: the author explained the syntax of for loop like this: loop_statement ::= [loop_label][iteraction_scheme] loop sequence_of_statements end loop [loop_label]. I learned some VHDL constructs from this book but they are not very clear. After finished reading the book, I still feel something missing and I need to refer to other VHDL books to fill up the gap. The author also spent only a few pages on synthesis and the index is poorly organized. With all of these and combined with its ridiculous price, I would recommend to borrow the book from library if you want some tips on good coding styles. But I won't recommend to buy it if you want to learn basic VHDL, because the book is no good for that purpose.

Summary: No other book needed
Rating: 5
This is the best of 4 books I purchased on the subject of VHDL, by a factor of 10. The price took me by surprise but it was readily available through the third party link. Buy this one and you won't need any of the others. If I would have purchased this one a year ago it would have saved me much grief.

Summary: A good reference book you will consult again and again
Rating: 5
This is a very good reference book for checking coding styles and syntax for VHDL. There are several books that teach the basics of how to write VHDL code, but this book shows you best practices for doing a good design in your projects. This book is a must have for anyone who wants to become a proficient VHDL designer who can produce quality designs.

Summary: What a book!
Rating: 5
This book has just become my number one book to recommend to the students of the VHDL classes that I teach. It is very well written and the book is loaded with VHDL examples demonstrating the various constructs, statements and issues. In example 5.5.1.2, the author does the best job I have ever seen of explaining the difficult subject of "Projected Output". The subjects are frequently associated to the specifications found in the Language Reference Manual. When there is a linking issue between two or more design elements, the linking is clearly demonstrated with examples. The only negative is that the author spends far too much time and book space describing ways to "Enhance Readibility" or documenting your design--which is always a personal preference. But still, a five star book.

Summary: Excelent Book
Rating: 5
An indispensable book. He gets your mind thinking in VHDL coding. Not only in what you write, but how you write it for structure, consistancy and readability. Full of coding examples and test benches for almost every aspect of VHDL including the source code on CD. Ben's ideas for coding styles really gives a consistant look to all my code. Coding he gets into the nuts and bolts of VHDL. Types, arrays, functions, aggregates, cases, generics, packages, concurrent, sequential, parameters formal and actual ..., the rationals explain why and examples examples examples. This book sits with me at all times.

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Icanfly2011

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thanks a lot.

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