在VCS2409上跑一个UVM的demo，跑起来不正常，求助

wintopest

在VCS上跑一个UVM的小样例程序，用的是uvm-2020.2.2，可以正常跑起来，但是明显跑起来的是有问题的。仿真只停留在0时刻就退出了。
请指点迷津，多谢多谢！




MakeFile:
==========================================================================
all: clean comp run


clean:
        rm -rf ./simv* ./csrc ./*.log ./vc_hdrs.h ./ucli.key


comp:
        vcs -full64 -sverilog -timescale=1ns/1ns -ntb_opts uvm-ieee-2020-2.0 +incdir+. simple.sv -l comp.log


run:
        ./simv  +UVM_NO_RELNOTES  -l run.log




UVM demo: simple.sv
====================================================================
`timescale 1ns/1ns
module test;
  import uvm_pkg::*;
  `include "uvm_macros.svh"


  const uvm_test_done_objection total_test_done = uvm_test_done_objection::get();


  class simple_test extends uvm_test;
    function new (string name, uvm_component parent);
      super.new(name, parent);
    endfunction : new


    `uvm_component_utils(simple_test)


    virtual task run_phase(uvm_phase phase);
      uvm_report_info("drain", "Setting drain time of 30", UVM_NONE);
      total_test_done.set_drain_time(this,30);
      fork
        doit(35);
        doit(25);
        doit(50);
        doit(15);
      join
          uvm_report_info("[run_phase]", "run_phase endded...", UVM_NONE);
    endtask


    task doit (time delay);
      static int s_inst = 0; int inst = s_inst++;


      total_test_done.raise_objection(this);


      uvm_report_info("doit", $sformatf("Starting doit (%0d) with delay %0t", inst, delay), UVM_NONE);
      #delay;
      uvm_report_info("doit", $sformatf("Ending doit (%0d)", inst), UVM_NONE);


      total_test_done.drop_objection(this);
    endtask


    virtual function void dropped (uvm_objection objection,
        uvm_object source_obj, string description, int count);
      uvm_report_info("dropped",
        $sformatf("%d objection(s) dropped from %s, total count is now %0d", count, source_obj.get_full_name, objection.get_objection_total(this)), UVM_NONE);
    endfunction


  endclass : simple_test


  initial
    run_test("simple_test");


endmodule


正常情况下，“Ending doit”会打印出来。但是我跑起来一直没有，仿真时间没有往前走就退出了。
demo里面应该需要改一下吧？
没搞明白，请牛人指点一下吧

追乐人66

都没传uvm_test能跑起来？