icc2在cts阶段报错

huw

大佬们好，小弟在用icc2跑cts时发生了报错然后闪退了，请问各位大佬遇到过类似的情况吗？该怎么解决呢
Use advanced legalizer engine : 0
INFO: Total Power Aware Optimization Enabled (Dynamic + Leakage)
Number of Site types in the design = 1
Setting up Chip Core
Chip Core shape: (0 0) (999360 960000)
Number of unique PDs = 1
Number of Power Domains = 1
Number of Voltage Areas = 1
Number of supply Nets = 2
Number of used supplies = 2

Running clock routing step.
set_app_options -as_user_default -list {route.global.global_route_topology_style 1}
route.global.global_route_topology_style 1
route_group -all_clock_nets -reuse_existing_global_route true
Turn off antenna since no rule is specified
Cell Min-Routing-Layer = M1
Cell Max-Routing-Layer = M7
Warning: Ignore pin (cell DRNQV1_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell DRNQV1_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKINV1_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKINV1_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell DSNQNV0P5_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell DSNQNV0P5_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell DRNQV3_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell DRNQV3_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AC1CONV1_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AC1CONV1_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKINV3_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKINV3_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKINV0P5A_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKINV0P5A_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NAND4V0P5_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NAND4V0P5_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NOR3V0P5_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NOR3V0P5_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NAND3V0P5_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NAND3V0P5_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKNOR2V1A_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKNOR2V1A_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NOR4V0P5_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NOR4V0P5_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKNAND2V0P5A_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKNAND2V0P5A_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AOI22V1_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AOI22V1_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell OAI211V0P5_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell OAI211V0P5_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell OAOI211V0P5_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell OAOI211V0P5_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell OA1B2V0P5_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell OA1B2V0P5_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AOI31V0P5_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AOI31V0P5_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AO21V0P5_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AO21V0P5_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell OAI21V0P5_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell OAI21V0P5_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NOR2BV0P5_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NOR2BV0P5_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AOI211V0P5_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AOI211V0P5_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell OR2V0P5_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell OR2V0P5_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AOAI211V0P5_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AOAI211V0P5_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NOR3BV0P5_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NOR3BV0P5_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AOI21V0P5_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AOI21V0P5_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AO22V0P5_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AO22V0P5_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NAND3XXBV0P5_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NAND3XXBV0P5_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AND2V0P5_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AND2V0P5_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell OAI31V0P5_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell OAI31V0P5_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AND3V0P5_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AND3V0P5_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AOI222V0P5_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AOI222V0P5_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell OAI22V0P5_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell OAI22V0P5_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell DQV0P5_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell DQV0P5_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NOR2XBV1_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NOR2XBV1_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NOR2BV1_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NOR2BV1_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell INV1_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell INV1_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell XOR2V1A_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell XOR2V1A_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell OR2V1_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell OR2V1_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NAND4V1_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NAND4V1_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NAND3V1_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NAND3V1_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AND2V1_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AND2V1_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell OA21V0P5_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell OA21V0P5_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AOI31V1_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AOI31V1_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AOI211V1_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AOI211V1_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell OAI31V1_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell OAI31V1_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NAND2V1_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NAND2V1_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKOR2V1A_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKOR2V1A_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell XOR2V0P5A_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell XOR2V0P5A_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell XNOR2V0P5A_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell XNOR2V0P5A_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AOI21BV0P5_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AOI21BV0P5_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NOR2V1_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NOR2V1_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell OAI211V1_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell OAI211V1_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AO1B2V0P5_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AO1B2V0P5_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NAND2BV0P5_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NAND2BV0P5_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell MUX2NV1C_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell MUX2NV1C_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AOAI211V1_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AOAI211V1_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell BUFV1_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell BUFV1_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AOI21V1_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AOI21V1_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell XNOR2V1A_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell XNOR2V1A_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell BUFV4_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell BUFV4_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKNAND2V2A_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKNAND2V2A_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKBUFV4_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKBUFV4_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell BUFV8_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell BUFV8_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKINV2_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKINV2_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell INV6_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell INV6_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell INV5_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell INV5_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell INV4_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell INV4_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKINV4A_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKINV4A_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKINV6A_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKINV6A_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKINV5A_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKINV5A_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKINV2A_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKINV2A_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NAND2XBV4_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NAND2XBV4_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell OAI211V2_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell OAI211V2_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell OAI31V3_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell OAI31V3_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell OAI31V4_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell OAI31V4_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AOI211V5_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AOI211V5_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AOI31V4_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AOI31V4_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell OAOI211V1_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell OAOI211V1_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKNAND2V1A_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKNAND2V1A_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKNAND2V3A_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKNAND2V3A_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NOR3XXBV2_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NOR3XXBV2_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AOI31V2_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AOI31V2_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKNAND2V4A_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKNAND2V4A_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AOI211V4_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AOI211V4_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell OAI31V2_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell OAI31V2_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NAND4V4_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NAND4V4_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NAND4V8_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NAND4V8_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NAND4V2_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NAND4V2_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AOI22V2_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AOI22V2_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKOR2V2A_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKOR2V2A_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NOR2XBV2_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NOR2XBV2_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKAND2V2A_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKAND2V2A_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NOR2XBV3_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NOR2XBV3_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NOR2BV4_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NOR2BV4_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKAND2V2_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKAND2V2_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell OAI211V3_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell OAI211V3_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AOI31V3_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AOI31V3_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKBUFV4A_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKBUFV4A_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKNOR2V2A_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKNOR2V2A_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKBUFV8_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKBUFV8_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell OAI211V4_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell OAI211V4_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell BUFV12_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell BUFV12_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKNAND2V2_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKNAND2V2_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKNOR2V3A_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKNOR2V3A_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NOR3V4_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NOR3V4_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NAND3V5_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NAND3V5_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AOI21V2_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AOI21V2_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AOI211V2_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AOI211V2_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NOR3BBV2_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NOR3BBV2_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NOR3V1_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NOR3V1_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NAND4V3_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NAND4V3_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NAND2BV2_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NAND2BV2_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NAND2XBV1_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NAND2XBV1_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NOR2BV2_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NOR2BV2_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKINV8A_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKINV8A_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKBUFV1A_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKBUFV1A_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell MUX2NV3_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell MUX2NV3_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell OAI21V2_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell OAI21V2_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell XNOR2V2C_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell XNOR2V2C_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell XNOR2V4C_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell XNOR2V4C_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell XOR2V4C_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell XOR2V4C_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NOR3V12_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NOR3V12_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell XNOR2V5_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell XNOR2V5_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell XNOR2V6_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell XNOR2V6_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKXOR2V6A_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKXOR2V6A_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKINV10_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKINV10_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell XOR2V1C_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell XOR2V1C_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell DCAPCLKBUFV8_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell DCAPCLKBUFV8_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKNAND2V3_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKNAND2V3_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell BUFV10_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell BUFV10_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell INV10_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell INV10_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKINV10A_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKINV10A_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell INV8_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell INV8_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell INV12_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell INV12_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell XNOR2V2_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell XNOR2V2_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NOR4BV3_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NOR4BV3_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell DCAPCLKINV10_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell DCAPCLKINV10_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AOAI211V3_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AOAI211V3_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKINV12A_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKINV12A_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell INV16_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell INV16_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKINV20A_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKINV20A_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell XNOR2V8_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell XNOR2V8_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell XOR2V2C_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell XOR2V2C_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AOI21BV2_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AOI21BV2_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AOI22V8_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AOI22V8_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AOI22V4_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AOI22V4_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AOI22V3_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AOI22V3_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKOR2V4A_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKOR2V4A_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell OAI21V1_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell OAI21V1_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NAND2V2_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NAND2V2_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NOR3V2_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NOR3V2_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell INV2_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell INV2_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NOR2V2_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NOR2V2_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell OR2V4_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell OR2V4_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AOI22V5_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AOI22V5_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKBUFV8A_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKBUFV8A_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NAND2V4_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NAND2V4_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NAND3V3_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NAND3V3_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NAND3V2_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NAND3V2_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell OA12V1_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell OA12V1_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell OA21V4_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell OA21V4_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell OR2V6_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell OR2V6_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AND2V10_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AND2V10_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell MUX2NV2_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell MUX2NV2_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell OAI21V3_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell OAI21V3_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NOR2XBV8_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NOR2XBV8_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NOR2V3_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NOR2V3_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKAND2V4_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKAND2V4_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell MUX2NV4_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell MUX2NV4_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NAND2V3_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NAND2V3_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKNAND2V4_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKNAND2V4_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKNAND2V5_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKNAND2V5_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AND2V4_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AND2V4_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NOR4V1_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NOR4V1_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NOR4V2_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NOR4V2_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NAND2XBV2_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NAND2XBV2_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell XNOR2V3_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell XNOR2V3_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell OAI21V4_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell OAI21V4_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AOI21BV4_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AOI21BV4_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell OR2V2_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell OR2V2_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NOR2BV8_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NOR2BV8_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NAND3V6_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NAND3V6_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKAND2V4A_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKAND2V4A_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell OAI211V8_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell OAI211V8_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell OAOI211V3_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell OAOI211V3_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NAND3V4_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NAND3V4_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKNAND2V6_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKNAND2V6_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell OAOI211V4_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell OAOI211V4_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NAND2BV1_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NAND2BV1_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NAND2BV4_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NAND2BV4_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AND2V2_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AND2V2_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell OAI22V2_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell OAI22V2_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NAND2XBV3_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NAND2XBV3_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell XOR2V1_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell XOR2V1_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AOAI211V4_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AOAI211V4_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AOI21V4_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AOI21V4_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKINV8_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKINV8_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell BUFV16_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell BUFV16_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AO12V2_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AO12V2_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKNAND2V8A_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKNAND2V8A_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NOR2V4_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NOR2V4_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell OAI211V6_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell OAI211V6_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NOR2XBV6_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NOR2XBV6_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell OR2V10_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell OR2V10_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NOR3BBV1_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NOR3BBV1_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AO22V1_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AO22V1_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NOR2XBV4_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NOR2XBV4_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AOI21V3_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AOI21V3_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NOR3V8_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NOR3V8_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NAND2BV8_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NAND2BV8_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell OAI21V5_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell OAI21V5_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AND2V6_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AND2V6_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell OAOI211V2_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell OAOI211V2_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AO21BV2_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AO21BV2_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell OAI21V6_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell OAI21V6_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell OA21BV2_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell OA21BV2_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKNOR2V3_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKNOR2V3_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NAND2V8_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NAND2V8_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell DQV3_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell DQV3_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell BUFV6_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell BUFV6_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell DCAPCLKBUFV3A_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell DCAPCLKBUFV3A_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKBUFV3_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKBUFV3_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell DCAPCLKBUFV12_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell DCAPCLKBUFV12_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NOR2BV3_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NOR2BV3_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell OR2V8_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell OR2V8_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKINV4_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKINV4_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell DCAPCLKBUFV3_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell DCAPCLKBUFV3_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AO21V4_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AO21V4_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKNOR2V6_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKNOR2V6_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AND2V5_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AND2V5_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AND2V8_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AND2V8_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKNAND2V10_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKNAND2V10_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AOI22V6_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AOI22V6_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKNOR2V4_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKNOR2V4_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell OAI21BV2_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell OAI21BV2_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NAND2XBV5_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NAND2XBV5_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NAND2BV3_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NAND2BV3_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell OR2V12_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell OR2V12_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKNAND2V8_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKNAND2V8_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NAND2V6_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NAND2V6_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKBUFV10_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKBUFV10_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKBUFV6A_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKBUFV6A_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKBUFV12A_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKBUFV12A_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NAND3V8_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NAND3V8_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell OAI21V8_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell OAI21V8_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NOR3V5_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NOR3V5_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKBUFV16A_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKBUFV16A_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKBUFV20A_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKBUFV20A_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AND2V16_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AND2V16_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AOI21V6_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AOI21V6_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell BUFV20_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell BUFV20_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell XOR2V6_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell XOR2V6_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell XNOR2V4_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell XNOR2V4_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell INV3_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell INV3_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKINV24A_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKINV24A_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell BUFV14_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell BUFV14_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell DCAPCLKINV3A_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell DCAPCLKINV3A_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NAND3V10_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NAND3V10_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NOR3V3_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NOR3V3_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKXOR2V3_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKXOR2V3_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKNOR2V14A_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKNOR2V14A_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NAND2V12_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NAND2V12_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKINV14A_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKINV14A_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell OA12V2_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell OA12V2_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKBUFV10A_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKBUFV10A_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell DCAPCLKBUFV10_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell DCAPCLKBUFV10_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NAND2V14_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NAND2V14_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AO21BV3_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AO21BV3_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NAND2V5_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NAND2V5_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKNAND2V12A_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKNAND2V12A_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKNAND2V16_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKNAND2V16_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AO12V1_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AO12V1_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AOAI211V2_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AOAI211V2_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AOI211V8_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AOI211V8_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NOR3BBV4_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NOR3BBV4_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKBUFV3A_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKBUFV3A_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKINV16_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKINV16_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKINV12_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKINV12_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AOI21V5_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AOI21V5_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NOR2V5_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NOR2V5_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell BUFV2_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell BUFV2_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKINV20_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKINV20_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKINV16A_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKINV16A_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell OAI22V3_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell OAI22V3_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AOI21BV3_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AOI21BV3_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NAND2XBV8_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NAND2XBV8_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NAND2XBV6_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NAND2XBV6_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell XOR2V5_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell XOR2V5_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKINV1A_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKINV1A_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NOR2V6_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NOR2V6_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AND3V1_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AND3V1_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKNAND2V16A_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKNAND2V16A_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NAND3BV1_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NAND3BV1_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NAND3XXBV2_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NAND3XXBV2_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell OAI21BV1_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell OAI21BV1_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NOR2V8_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NOR2V8_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AND4V4_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AND4V4_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NAND3V12_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NAND3V12_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell OA22V1_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell OA22V1_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKNAND2V14_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKNAND2V14_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell BUFV24_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell BUFV24_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NOR3V6_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NOR3V6_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKNAND2V12_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKNAND2V12_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NOR2V12_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NOR2V12_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AO21V2_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AO21V2_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell OR3V1_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell OR3V1_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKOR2V4_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKOR2V4_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell OA21V2_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell OA21V2_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NOR2V10_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NOR2V10_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NAND2V10_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NAND2V10_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell OR3V4_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell OR3V4_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKNOR2V6A_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKNOR2V6A_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKNAND2V24A_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKNAND2V24A_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NOR2V14_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NOR2V14_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NOR3BV1_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NOR3BV1_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NAND3BBV1_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NAND3BBV1_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NAND3BBV3_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NAND3BBV3_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NOR3V10_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NOR3V10_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NAND3BBV2_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NAND3BBV2_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell OA22V4_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell OA22V4_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NAND3BV4_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NAND3BV4_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell OAI22V1_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell OAI22V1_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AO1B2V1_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AO1B2V1_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NAND4BBV4_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NAND4BBV4_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell INV14_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell INV14_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell DRNQV4_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell DRNQV4_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AOI21V8_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AOI21V8_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell OAI21BV4_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell OAI21BV4_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NOR3BBV3_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NOR3BBV3_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NAND2V16_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NAND2V16_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AND3V4_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AND3V4_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell MAJ23V2_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell MAJ23V2_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell INV20_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell INV20_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKINV6_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKINV6_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AND3V8_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AND3V8_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AND2V12_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AND2V12_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NAND3BBV4_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NAND3BBV4_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKNAND2V20A_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKNAND2V20A_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AOI22BBV1_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AOI22BBV1_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AOI22BBV2_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AOI22BBV2_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NAND3BV8_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NAND3BV8_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKNOR2V10_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKNOR2V10_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKNOR2V14_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKNOR2V14_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NAND2BV5_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NAND2BV5_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKNOR2V12_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKNOR2V12_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AO1B2V4_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AO1B2V4_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AO21BV4_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AO21BV4_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKINV5_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKINV5_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell OR3V8_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell OR3V8_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NOR2V20_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NOR2V20_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AOI22BBV3_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AOI22BBV3_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKNOR2V8A_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKNOR2V8A_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NAND3XXBV4_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NAND3XXBV4_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NAND3BV5_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NAND3BV5_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AND3V6_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AND3V6_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKNOR2V2_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKNOR2V2_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NOR4BBV4_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NOR4BBV4_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NOR3XXBV4_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NOR3XXBV4_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NOR3BV4_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NOR3BV4_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NAND3XXBV1_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NAND3XXBV1_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell OA22V2_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell OA22V2_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NOR2V16_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NOR2V16_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell MUX2V2_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell MUX2V2_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AC1CONV2_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AC1CONV2_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKNOR2V8_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKNOR2V8_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell DCAPCLKBUFV14_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell DCAPCLKBUFV14_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NOR3BV6_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NOR3BV6_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AOI32V1_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AOI32V1_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKNOR2V10A_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKNOR2V10A_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AOI22BBV4_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AOI22BBV4_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AO1B2V2_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AO1B2V2_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell NOR3BV8_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell NOR3BV8_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell OAI21BV3_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell OAI21BV3_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell OAI22V4_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell OAI22V4_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKNAND2V20_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKNAND2V20_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell OAI22V5_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell OAI22V5_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKNOR2V20_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKNOR2V20_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell XOR2V4_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell XOR2V4_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKBUFV1_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKBUFV1_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell XOR2V8_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell XOR2V8_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AD1V1C_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AD1V1C_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AD1V2C_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AD1V2C_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKNOR2V1_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKNOR2V1_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKNAND2V1_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKNAND2V1_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell DCAPCLKINV1_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell DCAPCLKINV1_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell DCAPCLKBUFV2_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell DCAPCLKBUFV2_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKNOR2V16A_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKNOR2V16A_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AOI21BV1_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AOI21BV1_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKINV14_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKINV14_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell DCAPCLKINV2_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell DCAPCLKINV2_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKBUFV5A_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKBUFV5A_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKBUFV2_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKBUFV2_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell BUFV5_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell BUFV5_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKAND2V1_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKAND2V1_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKNOR2V12A_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKNOR2V12A_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKXOR2V8A_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKXOR2V8A_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKINV24_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKINV24_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AO21BV1_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AO21BV1_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell OA21BV1_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell OA21BV1_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKNOR2V16_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKNOR2V16_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell OAI22V6_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell OAI22V6_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKBUFV12_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKBUFV12_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell DRNQV2_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell DRNQV2_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell OAI22V8_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell OAI22V8_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell INV24_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell INV24_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell AOI32V3_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell AOI32V3_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell OA1B2V4_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell OA1B2V4_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKXOR2V6_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKXOR2V6_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKOR2V1_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKOR2V1_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKXOR2V8_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKXOR2V8_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell CLKXOR2V2_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell CLKXOR2V2_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore pin (cell DCAPCLKBUFV5A_96S7P5T24R, pin VPW) on layer SN. (ZRT-030)
Warning: Ignore pin (cell DCAPCLKBUFV5A_96S7P5T24R, pin VNW) on layer NW. (ZRT-030)
Warning: Ignore 2 top cell ports with no pins. (ZRT-027)
Info: number of net_type_blockage: 0
Via on layer (TV1) needs more than one tracks
Warning: Layer M7 pitch 0.080 may be too small: wire/via-down 0.080, wire/via-up 0.240. (ZRT-026)
Via on layer (PA) needs more than one tracks
Warning: Layer TM2 pitch 0.720 may be too small: wire/via-down 0.720, wire/via-up 2.340. (ZRT-026)
Via on layer (PA) needs more than one tracks
Warning: Layer ALPA pitch 4.050 may be too small: wire/via-down 4.950, wire/via-up 4.050. (ZRT-026)
Start Global Route ...
[Init] Elapsed real time: 0:00:00
[Init] Elapsed cpu  time: sys=0:00:00 usr=0:00:00 total=0:00:00
[Init] Stage (MB): Used    0  Alloctr    0  Proc    0
[Init] Total (MB): Used  165  Alloctr  169  Proc 2358
GR will route in ATREE-style.
Printing options for 'route.common.*'

Printing options for 'route.global.*'
global.deterministic                                    :         off                 
global.global_route_topology_style                      :         1                  
global.placement_timing_driven_mode                     :         false               
global.timing_driven                                    :         false               

Begin global routing.
Loading parastics information to the router ...
Warning: Parasitic Tech Library layer 'ALPA' parameter 'SMIN' = 1.800 does not match 2.250 of technology file (NEX-007)
Warning: Parasitic Tech Library layer 'ALPA' parameter 'SMIN' = 1.800 does not match 2.250 of technology file (NEX-007)
parastics information loaded to the router.
Constructing data structure ...
Information: Double patterning layer M1 will be routed with target utilization ratio of 80 per cent. (ZRT-138)
Information: Double patterning layer M2 will be routed with target utilization ratio of 80 per cent. (ZRT-138)
Information: Double patterning layer M3 will be routed with target utilization ratio of 85 per cent. (ZRT-138)
Information: Non-DPT layer M4 will be routed with target utilization ratio of 100 per cent. (ZRT-138)
Information: Non-DPT layer M5 will be routed with target utilization ratio of 100 per cent. (ZRT-138)
Information: Non-DPT layer M6 will be routed with target utilization ratio of 100 per cent. (ZRT-138)
Information: Non-DPT layer M7 will be routed with target utilization ratio of 100 per cent. (ZRT-138)
Information: Non-DPT layer TM1 will be routed with target utilization ratio of 100 per cent. (ZRT-138)
Information: Non-DPT layer TM2 will be routed with target utilization ratio of 100 per cent. (ZRT-138)
Information: Non-DPT layer ALPA will be routed with target utilization ratio of 100 per cent. (ZRT-138)
Design statistics:
Design Bounding Box (0.00,0.00,99.94,96.00)
Number of routing layers = 10
layer M1, dir Ver, min width = 0.03, min space = 0.03 pitch = 0.10
layer M2, dir Hor, min width = 0.03, min space = 0.03 pitch = 0.06
layer M3, dir Ver, min width = 0.03, min space = 0.03 pitch = 0.07
layer M4, dir Hor, min width = 0.04, min space = 0.04 pitch = 0.08
layer M5, dir Ver, min width = 0.04, min space = 0.04 pitch = 0.08
layer M6, dir Hor, min width = 0.04, min space = 0.04 pitch = 0.08
layer M7, dir Ver, min width = 0.04, min space = 0.04 pitch = 0.08
layer TM1, dir Hor, min width = 0.36, min space = 0.36 pitch = 0.72
layer TM2, dir Ver, min width = 0.36, min space = 0.36 pitch = 0.72
layer ALPA, dir Hor, min width = 1.80, min space = 2.25 pitch = 4.05
Current Stage stats:
[End of Build Tech Data] Elapsed real time: 0:00:00
[End of Build Tech Data] Elapsed cpu  time: sys=0:00:00 usr=0:00:00 total=0:00:00
[End of Build Tech Data] Stage (MB): Used    1  Alloctr    1  Proc    0
[End of Build Tech Data] Total (MB): Used  167  Alloctr  171  Proc 2358
Net statistics:
Total number of nets     = 17980
Number of nets to route  = 15
Number of single or zero port nets = 1
Number of nets with min-layer-mode soft = 15
Number of nets with min-layer-mode soft-cost-medium = 15
16 nets are fully connected,
of which 1 are detail routed and 15 are global routed.
15 nets have non-default rule clock_trunk
Current Stage stats:
[End of Build All Nets] Elapsed real time: 0:00:00
[End of Build All Nets] Elapsed cpu  time: sys=0:00:00 usr=0:00:00 total=0:00:00
[End of Build All Nets] Stage (MB): Used    6  Alloctr    5  Proc    0
[End of Build All Nets] Total (MB): Used  173  Alloctr  177  Proc 2358
Average gCell capacity  0.00         on layer (1)         M1
Average gCell capacity  4.96         on layer (2)         M2
Average gCell capacity  6.29         on layer (3)         M3
Average gCell capacity  5.72         on layer (4)         M4
Average gCell capacity  3.28         on layer (5)         M5
Average gCell capacity  3.38         on layer (6)         M6
Average gCell capacity  3.28         on layer (7)         M7
Average gCell capacity  0.66         on layer (8)         TM1
Average gCell capacity  0.00         on layer (9)         TM2
Average gCell capacity  0.00         on layer (10)         ALPA
Average number of tracks per gCell 5.01         on layer (1)         M1
Average number of tracks per gCell 7.51         on layer (2)         M2
Average number of tracks per gCell 6.87         on layer (3)         M3
Average number of tracks per gCell 6.01         on layer (4)         M4
Average number of tracks per gCell 6.01         on layer (5)         M5
Average number of tracks per gCell 6.01         on layer (6)         M6
Average number of tracks per gCell 6.01         on layer (7)         M7
Average number of tracks per gCell 0.67         on layer (8)         TM1
Average number of tracks per gCell 0.67         on layer (9)         TM2
Average number of tracks per gCell 0.12         on layer (10)         ALPA
Number of gCells = 416000
Current Stage stats:
[End of Build Congestion map] Elapsed real time: 0:00:00
[End of Build Congestion map] Elapsed cpu  time: sys=0:00:00 usr=0:00:00 total=0:00:00
[End of Build Congestion map] Stage (MB): Used    3  Alloctr    3  Proc    0
[End of Build Congestion map] Total (MB): Used  177  Alloctr  180  Proc 2358
Information: RC layer preference is turned on for this design. (ZRT-613)
Total stats:
[End of Build Data] Elapsed real time: 0:00:00
[End of Build Data] Elapsed cpu  time: sys=0:00:00 usr=0:00:00 total=0:00:00
[End of Build Data] Stage (MB): Used   11  Alloctr   10  Proc    0
[End of Build Data] Total (MB): Used  177  Alloctr  180  Proc 2358
Current Stage stats:
[End of Blocked Pin Detection] Elapsed real time: 0:00:00
[End of Blocked Pin Detection] Elapsed cpu  time: sys=0:00:00 usr=0:00:00 total=0:00:00
[End of Blocked Pin Detection] Stage (MB): Used    0  Alloctr    0  Proc    0
[End of Blocked Pin Detection] Total (MB): Used  177  Alloctr  180  Proc 2358
Information: Using 1 threads for routing. (ZRT-444)
multi gcell levels ON

Start GR phase 0
Current Stage stats:
[End of Initial Routing] Elapsed real time: 0:00:00
[End of Initial Routing] Elapsed cpu  time: sys=0:00:00 usr=0:00:00 total=0:00:00
[End of Initial Routing] Stage (MB): Used    0  Alloctr    0  Proc    0
[End of Initial Routing] Total (MB): Used  177  Alloctr  180  Proc 2358
Initial. Routing result:
Initial. Both Dirs: Overflow =    12 Max = 5 GRCs =     5 (0.01%)
Initial. H routing: Overflow =     1 Max = 2 (GRCs =  1) GRCs =     1 (0.00%)
Initial. V routing: Overflow =    11 Max = 5 (GRCs =  1) GRCs =     4 (0.01%)
Initial. M1         Overflow =     0 Max = 0 (GRCs =  0) GRCs =     0 (0.00%)
Initial. M2         Overflow =     1 Max = 2 (GRCs =  1) GRCs =     1 (0.00%)
Initial. M3         Overflow =    11 Max = 5 (GRCs =  1) GRCs =     4 (0.01%)
Initial. M4         Overflow =     0 Max = 0 (GRCs =  0) GRCs =     0 (0.00%)
Initial. M5         Overflow =     0 Max = 0 (GRCs =  0) GRCs =     0 (0.00%)
Initial. M6         Overflow =     0 Max = 0 (GRCs =  0) GRCs =     0 (0.00%)
Initial. M7         Overflow =     0 Max = 0 (GRCs =  0) GRCs =     0 (0.00%)
Initial. TM1        Overflow =     0 Max = 0 (GRCs =  0) GRCs =     0 (0.00%)
Initial. TM2        Overflow =     0 Max = 0 (GRCs =  0) GRCs =     0 (0.00%)
Initial. ALPA       Overflow =     0 Max = 0 (GRCs =  0) GRCs =     0 (0.00%)

Initial. Total Wire Length = 1085.91
Initial. Layer M1 wire length = 12.83
Initial. Layer M2 wire length = 22.18
Initial. Layer M3 wire length = 0.48
Initial. Layer M4 wire length = 523.75
Initial. Layer M5 wire length = 515.63
Initial. Layer M6 wire length = 10.08
Initial. Layer M7 wire length = 0.96
Initial. Layer TM1 wire length = 0.00
Initial. Layer TM2 wire length = 0.00
Initial. Layer ALPA wire length = 0.00
Initial. Total Number of Contacts = 936
Initial. Via V1_15_15_36_0 count = 78
Initial. Via V2_24_0_3_32 count = 258
Initial. Via V3_3_24_34_4 count = 261
Initial. Via V4_49_0_0_49 count = 329
Initial. Via V5_0_49_49_0 count = 6
Initial. Via V6_49_0_0_49 count = 4
Initial. Via TV1_18_71_71_18 count = 0
Initial. Via TV2_71_18_18_71 count = 0
Initial. Via V9_45_45_45_45 count = 0
Initial. completed.

Start GR phase 1
Current Stage stats:
[End of Phase1 Routing] Elapsed real time: 0:00:00
[End of Phase1 Routing] Elapsed cpu  time: sys=0:00:00 usr=0:00:00 total=0:00:00
[End of Phase1 Routing] Stage (MB): Used    0  Alloctr    0  Proc    0
[End of Phase1 Routing] Total (MB): Used  177  Alloctr  180  Proc 2358
phase1. Routing result:
phase1. Both Dirs: Overflow =    10 Max = 5 GRCs =     4 (0.00%)
phase1. H routing: Overflow =     1 Max = 2 (GRCs =  1) GRCs =     1 (0.00%)
phase1. V routing: Overflow =     9 Max = 5 (GRCs =  1) GRCs =     3 (0.01%)
phase1. M1         Overflow =     0 Max = 0 (GRCs =  0) GRCs =     0 (0.00%)
phase1. M2         Overflow =     1 Max = 2 (GRCs =  1) GRCs =     1 (0.00%)
phase1. M3         Overflow =     9 Max = 5 (GRCs =  1) GRCs =     3 (0.01%)
phase1. M4         Overflow =     0 Max = 0 (GRCs =  0) GRCs =     0 (0.00%)
phase1. M5         Overflow =     0 Max = 0 (GRCs =  0) GRCs =     0 (0.00%)
phase1. M6         Overflow =     0 Max = 0 (GRCs =  0) GRCs =     0 (0.00%)
phase1. M7         Overflow =     0 Max = 0 (GRCs =  0) GRCs =     0 (0.00%)
phase1. TM1        Overflow =     0 Max = 0 (GRCs =  0) GRCs =     0 (0.00%)
phase1. TM2        Overflow =     0 Max = 0 (GRCs =  0) GRCs =     0 (0.00%)
phase1. ALPA       Overflow =     0 Max = 0 (GRCs =  0) GRCs =     0 (0.00%)

phase1. Total Wire Length = 1081.06
phase1. Layer M1 wire length = 11.87
phase1. Layer M2 wire length = 22.18
phase1. Layer M3 wire length = 0.48
phase1. Layer M4 wire length = 519.89
phase1. Layer M5 wire length = 515.61
phase1. Layer M6 wire length = 10.08
phase1. Layer M7 wire length = 0.96
phase1. Layer TM1 wire length = 0.00
phase1. Layer TM2 wire length = 0.00
phase1. Layer ALPA wire length = 0.00
phase1. Total Number of Contacts = 937
phase1. Via V1_15_15_36_0 count = 78
phase1. Via V2_24_0_3_32 count = 258
phase1. Via V3_3_24_34_4 count = 261
phase1. Via V4_49_0_0_49 count = 330
phase1. Via V5_0_49_49_0 count = 6
phase1. Via V6_49_0_0_49 count = 4
phase1. Via TV1_18_71_71_18 count = 0
phase1. Via TV2_71_18_18_71 count = 0
phase1. Via V9_45_45_45_45 count = 0
phase1. completed.

Start GR phase 2
Current Stage stats:
[End of Phase2 Routing] Elapsed real time: 0:00:00
[End of Phase2 Routing] Elapsed cpu  time: sys=0:00:00 usr=0:00:00 total=0:00:00
[End of Phase2 Routing] Stage (MB): Used    0  Alloctr    0  Proc    0
[End of Phase2 Routing] Total (MB): Used  177  Alloctr  180  Proc 2358
phase2. Routing result:
phase2. Both Dirs: Overflow =     3 Max = 2 GRCs =     3 (0.00%)
phase2. H routing: Overflow =     3 Max = 2 (GRCs =  1) GRCs =     3 (0.01%)
phase2. V routing: Overflow =     0 Max = 0 (GRCs =  0) GRCs =     0 (0.00%)
phase2. M1         Overflow =     0 Max = 0 (GRCs =  0) GRCs =     0 (0.00%)
phase2. M2         Overflow =     3 Max = 2 (GRCs =  1) GRCs =     3 (0.01%)
phase2. M3         Overflow =     0 Max = 0 (GRCs =  0) GRCs =     0 (0.00%)
phase2. M4         Overflow =     0 Max = 0 (GRCs =  0) GRCs =     0 (0.00%)
phase2. M5         Overflow =     0 Max = 0 (GRCs =  0) GRCs =     0 (0.00%)
phase2. M6         Overflow =     0 Max = 0 (GRCs =  0) GRCs =     0 (0.00%)
phase2. M7         Overflow =     0 Max = 0 (GRCs =  0) GRCs =     0 (0.00%)
phase2. TM1        Overflow =     0 Max = 0 (GRCs =  0) GRCs =     0 (0.00%)
phase2. TM2        Overflow =     0 Max = 0 (GRCs =  0) GRCs =     0 (0.00%)
phase2. ALPA       Overflow =     0 Max = 0 (GRCs =  0) GRCs =     0 (0.00%)

phase2. Total Wire Length = 1083.94
phase2. Layer M1 wire length = 11.87
phase2. Layer M2 wire length = 24.10
phase2. Layer M3 wire length = 0.96
phase2. Layer M4 wire length = 520.85
phase2. Layer M5 wire length = 515.12
phase2. Layer M6 wire length = 10.08
phase2. Layer M7 wire length = 0.96
phase2. Layer TM1 wire length = 0.00
phase2. Layer TM2 wire length = 0.00
phase2. Layer ALPA wire length = 0.00
phase2. Total Number of Contacts = 936
phase2. Via V1_15_15_36_0 count = 78
phase2. Via V2_24_0_3_32 count = 258
phase2. Via V3_3_24_34_4 count = 261
phase2. Via V4_49_0_0_49 count = 329
phase2. Via V5_0_49_49_0 count = 6
phase2. Via V6_49_0_0_49 count = 4
phase2. Via TV1_18_71_71_18 count = 0
phase2. Via TV2_71_18_18_71 count = 0
phase2. Via V9_45_45_45_45 count = 0
phase2. completed.

Start GR phase 3
Current Stage stats:
[End of Phase3 Routing] Elapsed real time: 0:00:00
[End of Phase3 Routing] Elapsed cpu  time: sys=0:00:00 usr=0:00:00 total=0:00:00
[End of Phase3 Routing] Stage (MB): Used    0  Alloctr    0  Proc    0
[End of Phase3 Routing] Total (MB): Used  177  Alloctr  180  Proc 2358
phase3. Routing result:
phase3. Both Dirs: Overflow =     3 Max = 2 GRCs =     3 (0.00%)
phase3. H routing: Overflow =     3 Max = 2 (GRCs =  1) GRCs =     3 (0.01%)
phase3. V routing: Overflow =     0 Max = 0 (GRCs =  0) GRCs =     0 (0.00%)
phase3. M1         Overflow =     0 Max = 0 (GRCs =  0) GRCs =     0 (0.00%)
phase3. M2         Overflow =     3 Max = 2 (GRCs =  1) GRCs =     3 (0.01%)
phase3. M3         Overflow =     0 Max = 0 (GRCs =  0) GRCs =     0 (0.00%)
phase3. M4         Overflow =     0 Max = 0 (GRCs =  0) GRCs =     0 (0.00%)
phase3. M5         Overflow =     0 Max = 0 (GRCs =  0) GRCs =     0 (0.00%)
phase3. M6         Overflow =     0 Max = 0 (GRCs =  0) GRCs =     0 (0.00%)
phase3. M7         Overflow =     0 Max = 0 (GRCs =  0) GRCs =     0 (0.00%)
phase3. TM1        Overflow =     0 Max = 0 (GRCs =  0) GRCs =     0 (0.00%)
phase3. TM2        Overflow =     0 Max = 0 (GRCs =  0) GRCs =     0 (0.00%)
phase3. ALPA       Overflow =     0 Max = 0 (GRCs =  0) GRCs =     0 (0.00%)

phase3. Total Wire Length = 1083.94
phase3. Layer M1 wire length = 11.87
phase3. Layer M2 wire length = 24.10
phase3. Layer M3 wire length = 0.96
phase3. Layer M4 wire length = 520.85
phase3. Layer M5 wire length = 515.12
phase3. Layer M6 wire length = 10.08
phase3. Layer M7 wire length = 0.96
phase3. Layer TM1 wire length = 0.00
phase3. Layer TM2 wire length = 0.00
phase3. Layer ALPA wire length = 0.00
phase3. Total Number of Contacts = 936
phase3. Via V1_15_15_36_0 count = 78
phase3. Via V2_24_0_3_32 count = 258
phase3. Via V3_3_24_34_4 count = 261
phase3. Via V4_49_0_0_49 count = 329
phase3. Via V5_0_49_49_0 count = 6
phase3. Via V6_49_0_0_49 count = 4
phase3. Via TV1_18_71_71_18 count = 0
phase3. Via TV2_71_18_18_71 count = 0
phase3. Via V9_45_45_45_45 count = 0
phase3. completed.
[End of Whole Chip Routing] Elapsed real time: 0:00:00
[End of Whole Chip Routing] Elapsed cpu  time: sys=0:00:00 usr=0:00:00 total=0:00:00
[End of Whole Chip Routing] Stage (MB): Used   11  Alloctr   10  Proc    0
[End of Whole Chip Routing] Total (MB): Used  177  Alloctr  180  Proc 2358

Information: Global Routing terminated early: false (ZRT-103)

Congestion utilization per direction:
Average vertical track utilization   =  6.40 %
Peak    vertical track utilization   = 100.00 %
Average horizontal track utilization =  4.37 %
Peak    horizontal track utilization = 80.00 %

Current Stage stats:
[GR: Done] Elapsed real time: 0:00:00
[GR: Done] Elapsed cpu  time: sys=0:00:00 usr=0:00:00 total=0:00:00
[GR: Done] Stage (MB): Used   -3  Alloctr   -3  Proc    0
[GR: Done] Total (MB): Used  174  Alloctr  178  Proc 2358
GR Total stats:
[GR: Done] Elapsed real time: 0:00:00
[GR: Done] Elapsed cpu  time: sys=0:00:00 usr=0:00:00 total=0:00:00
[GR: Done] Stage (MB): Used    8  Alloctr    8  Proc    0
[GR: Done] Total (MB): Used  174  Alloctr  178  Proc 2358
Updating congestion ...
Updating congestion ...
Final total stats:
[End of Global Routing] Elapsed real time: 0:00:00
[End of Global Routing] Elapsed cpu  time: sys=0:00:00 usr=0:00:00 total=0:00:00
[End of Global Routing] Stage (MB): Used    0  Alloctr    0  Proc    0
[End of Global Routing] Total (MB): Used  165  Alloctr  170  Proc 2358

Start track assignment

Printing options for 'route.common.*'

Printing options for 'route.track.*'
track.timing_driven                                     :         false               

Information: Using 1 threads for routing. (ZRT-444)
Information: RC layer preference is turned on for this design. (ZRT-613)

[Track Assign: Read routes] Elapsed real time: 0:00:00
[Track Assign: Read routes] Elapsed cpu  time: sys=0:00:00 usr=0:00:00 total=0:00:00
[Track Assign: Read routes] Stage (MB): Used    3  Alloctr    3  Proc    0
[Track Assign: Read routes] Total (MB): Used  165  Alloctr  169  Proc 2358

Start initial assignment

Assign Horizontal partitions, iteration 0
Routed partition 1/10      
Routed partition 2/10      
Routed partition 3/10      
Routed partition 4/10      
Routed partition 5/10      
Routed partition 6/10      
Routed partition 7/10      
Routed partition 8/10      
Routed partition 9/10      
Routed partition 10/10     

Assign Vertical partitions, iteration 0
Routed partition 1/11      
Routed partition 2/11      
Routed partition 3/11      
Routed partition 4/11      
Routed partition 5/11      
Routed partition 6/11      
Routed partition 7/11      
Routed partition 8/11      
Routed partition 9/11      
Routed partition 10/11     
Routed partition 11/11     

Number of wires with overlap after iteration 0 = 616 of 1371


[Track Assign: Iteration 0] Elapsed real time: 0:00:00
[Track Assign: Iteration 0] Elapsed cpu  time: sys=0:00:00 usr=0:00:00 total=0:00:00
[Track Assign: Iteration 0] Stage (MB): Used    8  Alloctr    8  Proc    0
[Track Assign: Iteration 0] Total (MB): Used  170  Alloctr  173  Proc 2358

Reroute to fix overlaps

Assign Horizontal partitions, iteration 1
Routed partition 1/10      
Routed partition 2/10      
Routed partition 3/10      
Routed partition 4/10      
Routed partition 5/10      
Routed partition 6/10      
Routed partition 7/10      
Routed partition 8/10      
Routed partition 9/10      
Routed partition 10/10     

Assign Vertical partitions, iteration 1
Routed partition 1/11      
Routed partition 2/11      
Routed partition 3/11      
Routed partition 4/11      
Routed partition 5/11      
Routed partition 6/11      
Routed partition 7/11      
Routed partition 8/11      
Routed partition 9/11      
Routed partition 10/11     
Routed partition 11/11     

[Track Assign: Iteration 1] Elapsed real time: 0:00:00
[Track Assign: Iteration 1] Elapsed cpu  time: sys=0:00:00 usr=0:00:00 total=0:00:00
[Track Assign: Iteration 1] Stage (MB): Used    8  Alloctr    8  Proc    0
[Track Assign: Iteration 1] Total (MB): Used  170  Alloctr  173  Proc 2358

Number of wires with overlap after iteration 1 = 261 of 872


Wire length and via report:
---------------------------
Number of M1 wires: 0                  V0: 0
Number of M2 wires: 209                  V1_15_15_36_0: 79
Number of M3 wires: 64                  V2_24_0_3_32: 263
Number of M4 wires: 345                  V3_3_24_34_4: 262
Number of M5 wires: 249                  V4_49_0_0_49: 331
Number of M6 wires: 3                  V5_0_49_49_0: 6
Number of M7 wires: 2                  V6_49_0_0_49: 4
Number of TM1 wires: 0                  TV1_18_71_71_18: 0
Number of TM2 wires: 0                  TV2_71_18_18_71: 0
Number of ALPA wires: 0                  V9_45_45_45_45: 0
Total number of wires: 872                  vias: 945

Total M1 wire length: 0.0
Total M2 wire length: 9.3
Total M3 wire length: 3.0
Total M4 wire length: 500.2
Total M5 wire length: 514.2
Total M6 wire length: 10.0
Total M7 wire length: 0.5
Total TM1 wire length: 0.0
Total TM2 wire length: 0.0
Total ALPA wire length: 0.0
Total wire length: 1037.2

Longest M1 wire length: 0.0
Longest M2 wire length: 0.5
Longest M3 wire length: 0.2
Longest M4 wire length: 35.1
Longest M5 wire length: 23.8
Longest M6 wire length: 3.5
Longest M7 wire length: 0.3
Longest TM1 wire length: 0.0
Longest TM2 wire length: 0.0
Longest ALPA wire length: 0.0


[Track Assign: Done] Elapsed real time: 0:00:00
[Track Assign: Done] Elapsed cpu  time: sys=0:00:00 usr=0:00:00 total=0:00:00
[Track Assign: Done] Stage (MB): Used    1  Alloctr    1  Proc    0
[Track Assign: Done] Total (MB): Used  163  Alloctr  167  Proc 2358
Printing options for 'route.common.*'

Printing options for 'route.detail.*'
detail.force_end_on_preferred_grid                      :         true               
detail.timing_driven                                    :         false               

Printing options for 'route.auto_via_ladder.*'

Information: RC layer preference is turned on for this design. (ZRT-613)
[Dr init] Elapsed real time: 0:00:00
[Dr init] Elapsed cpu  time: sys=0:00:00 usr=0:00:00 total=0:00:00
[Dr init] Stage (MB): Used    7  Alloctr    7  Proc    0
[Dr init] Total (MB): Used  171  Alloctr  175  Proc 2358
Total number of nets = 17980, of which 0 are not extracted
Total number of open nets = 17963, of which 0 are frozen
Information: Using 1 threads for routing. (ZRT-444)

Switch to reduced partition bloat for speedup (DRC report is not accurate)
Start DR iteration 0: uniform partition
Routed        11/420 Partitions, Violations =        0
Routed        16/420 Partitions, Violations =        0
Routed        17/420 Partitions, Violations =        0
Routed        22/420 Partitions, Violations =        0
Routed        23/420 Partitions, Violations =        0
Routed        24/420 Partitions, Violations =        0
Routed        29/420 Partitions, Violations =        0
Routed        30/420 Partitions, Violations =        0
Routed        31/420 Partitions, Violations =        0
Error: Assert '(lLA1 <= uRA1 && lLA2 <= uRA2) || (lLA1 == MIFS_MAX_DIM && lLA2 == MIFS_MAX_DIM && uRA1 == MIFS_MIN_DIM && uRA2 == MIFS_MIN_DIM)' ../../../include/MifsRect.h 131

Assertion failed:  "0", icc2_exec, rtndmUtil.cc, line 5306

Aborting.

Detailed stack trace :
---------------------------------
Thread 36 (Thread 0x7f4e381ff700 (LWP 4591)):
#0  0x00007f4e4ecf5b43 in select () from /lib64/libc.so.6
#1  0x00000000160d8426 in SNPSee_554ec7c90557bab679d871cd58526530 ()
#2  0x0000000015430aa1 in SNPSee_d9c72da67e7a1f57e9891545cd875e2719332304182309de ()
#3  0x00007f4e5e007ea5 in start_thread () from /lib64/libpthread.so.0
#4  0x00007f4e4ecfeb0d in clone () from /lib64/libc.so.6
Thread 35 (Thread 0x7f4e369ff700 (LWP 5005)):
#0  0x00007f4e4ecf3ddd in poll () from /lib64/libc.so.6
#1  0x00007f4e55209aaa in ?? () from /opt/synopsys/icc2/O-2018.06-SP1/linux64/nwtn/bin/../shlib/libxcb.so.1
#2  0x00007f4e5520b1c8 in xcb_wait_for_event () from /opt/synopsys/icc2/O-2018.06-SP1/linux64/nwtn/bin/../shlib/libxcb.so.1
#3  0x00007f4e36a3bed9 in ?? () from /opt/synopsys/icc2/O-2018.06-SP1/linux64/nwtn/bin/../shlib/libQt5XcbQpa.so.5
#4  0x00007f4e55ec1583 in ?? () from /opt/synopsys/icc2/O-2018.06-SP1/linux64/nwtn/bin/../shlib/libQt5Core.so.5
#5  0x0000000015430aa1 in SNPSee_d9c72da67e7a1f57e9891545cd875e2719332304182309de ()
#6  0x00007f4e5e007ea5 in start_thread () from /lib64/libpthread.so.0
#7  0x00007f4e4ecfeb0d in clone () from /lib64/libc.so.6
Thread 34 (Thread 0x7f4e31dff700 (LWP 5011)):
#0  0x00007f4e4ecf8e29 in syscall () from /lib64/libc.so.6
#1  0x00007f4e5e41b4fa in futex_wait (comparand=2, futex=0x27691fac) at ../../include/tbb/machine/linux_common.h:60
#2  P (this=0x27691fac) at ../../src/tbb/semaphore.h:206
#3  commit_wait (c=<synthetic pointer>, this=0x27691fa0) at ../../src/rml/include/../server/thread_monitor.h:259
#4  tbb::internal::rml::private_worker::run (this=0x27691f80) at ../../src/tbb/private_server.cpp:277
#5  0x00007f4e5e41b519 in tbb::internal::rml::private_worker::thread_routine (arg=<optimized out>) at ../../src/tbb/private_server.cpp:223
#6  0x0000000015430aa1 in SNPSee_d9c72da67e7a1f57e9891545cd875e2719332304182309de ()
#7  0x00007f4e5e007ea5 in start_thread () from /lib64/libpthread.so.0
#8  0x00007f4e4ecfeb0d in clone () from /lib64/libc.so.6
Thread 33 (Thread 0x7f4e315fe700 (LWP 5012)):
#0  0x00007f4e4ecf8e29 in syscall () from /lib64/libc.so.6
#1  0x00007f4e5e41b4fa in futex_wait (comparand=2, futex=0x2769202c) at ../../include/tbb/machine/linux_common.h:60
#2  P (this=0x2769202c) at ../../src/tbb/semaphore.h:206
#3  commit_wait (c=<synthetic pointer>, this=0x27692020) at ../../src/rml/include/../server/thread_monitor.h:259
#4  tbb::internal::rml::private_worker::run (this=0x27692000) at ../../src/tbb/private_server.cpp:277
#5  0x00007f4e5e41b519 in tbb::internal::rml::private_worker::thread_routine (arg=<optimized out>) at ../../src/tbb/private_server.cpp:223
#6  0x0000000015430aa1 in SNPSee_d9c72da67e7a1f57e9891545cd875e2719332304182309de ()
#7  0x00007f4e5e007ea5 in start_thread () from /lib64/libpthread.so.0
#8  0x00007f4e4ecfeb0d in clone () from /lib64/libc.so.6
Thread 32 (Thread 0x7f4e30dfd700 (LWP 5013)):
#0  0x00007f4e5e00ba35 in pthread_cond_wait@@GLIBC_2.3.2 () from /lib64/libpthread.so.0
#1  0x00007f4e55ec22e3 in QWaitCondition::wait(QMutex*, unsigned long) () from /opt/synopsys/icc2/O-2018.06-SP1/linux64/nwtn/bin/../shlib/libQt5Core.so.5
#2  0x00007f4e55ebdb19 in ?? () from /opt/synopsys/icc2/O-2018.06-SP1/linux64/nwtn/bin/../shlib/libQt5Core.so.5
#3  0x00007f4e55ec1583 in ?? () from /opt/synopsys/icc2/O-2018.06-SP1/linux64/nwtn/bin/../shlib/libQt5Core.so.5
#4  0x0000000015430aa1 in SNPSee_d9c72da67e7a1f57e9891545cd875e2719332304182309de ()
#5  0x00007f4e5e007ea5 in start_thread () from /lib64/libpthread.so.0
#6  0x00007f4e4ecfeb0d in clone () from /lib64/libc.so.6
Thread 31 (Thread 0x7f4e2fdfb700 (LWP 5014)):
#0  0x00007f4e4ecf8e29 in syscall () from /lib64/libc.so.6
#1  0x00007f4e5e41b4fa in futex_wait (comparand=2, futex=0x27691dac) at ../../include/tbb/machine/linux_common.h:60
#2  P (this=0x27691dac) at ../../src/tbb/semaphore.h:206
#3  commit_wait (c=<synthetic pointer>, this=0x27691da0) at ../../src/rml/include/../server/thread_monitor.h:259
#4  tbb::internal::rml::private_worker::run (this=0x27691d80) at ../../src/tbb/private_server.cpp:277
#5  0x00007f4e5e41b519 in tbb::internal::rml::private_worker::thread_routine (arg=<optimized out>) at ../../src/tbb/private_server.cpp:223
#6  0x0000000015430aa1 in SNPSee_d9c72da67e7a1f57e9891545cd875e2719332304182309de ()
#7  0x00007f4e5e007ea5 in start_thread () from /lib64/libpthread.so.0
#8  0x00007f4e4ecfeb0d in clone () from /lib64/libc.so.6
Thread 30 (Thread 0x7f4e305fc700 (LWP 5015)):
#0  0x00007f4e4ecf8e29 in syscall () from /lib64/libc.so.6
#1  0x00007f4e5e41b4fa in futex_wait (comparand=2, futex=0x27691eac) at ../../include/tbb/machine/linux_common.h:60
#2  P (this=0x27691eac) at ../../src/tbb/semaphore.h:206
#3  commit_wait (c=<synthetic pointer>, this=0x27691ea0) at ../../src/rml/include/../server/thread_monitor.h:259
#4  tbb::internal::rml::private_worker::run (this=0x27691e80) at ../../src/tbb/private_server.cpp:277
#5  0x00007f4e5e41b519 in tbb::internal::rml::private_worker::thread_routine (arg=<optimized out>) at ../../src/tbb/private_server.cpp:223
#6  0x0000000015430aa1 in SNPSee_d9c72da67e7a1f57e9891545cd875e2719332304182309de ()
#7  0x00007f4e5e007ea5 in start_thread () from /lib64/libpthread.so.0
#8  0x00007f4e4ecfeb0d in clone () from /lib64/libc.so.6
Thread 29 (Thread 0x7f4e2f5fa700 (LWP 5016)):
#0  0x00007f4e4ecf8e29 in syscall () from /lib64/libc.so.6
#1  0x00007f4e5e41b4fa in futex_wait (comparand=2, futex=0x27691e2c) at ../../include/tbb/machine/linux_common.h:60
#2  P (this=0x27691e2c) at ../../src/tbb/semaphore.h:206
#3  commit_wait (c=<synthetic pointer>, this=0x27691e20) at ../../src/rml/include/../server/thread_monitor.h:259
#4  tbb::internal::rml::private_worker::run (this=0x27691e00) at ../../src/tbb/private_server.cpp:277
#5  0x00007f4e5e41b519 in tbb::internal::rml::private_worker::thread_routine (arg=<optimized out>) at ../../src/tbb/private_server.cpp:223
#6  0x0000000015430aa1 in SNPSee_d9c72da67e7a1f57e9891545cd875e2719332304182309de ()
#7  0x00007f4e5e007ea5 in start_thread () from /lib64/libpthread.so.0
#8  0x00007f4e4ecfeb0d in clone () from /lib64/libc.so.6
Thread 28 (Thread 0x7f4e2e5f8700 (LWP 5017)):
#0  0x00007f4e4ecf8e29 in syscall () from /lib64/libc.so.6
#1  0x00007f4e5e41b4fa in futex_wait (comparand=2, futex=0x27691cac) at ../../include/tbb/machine/linux_common.h:60
#2  P (this=0x27691cac) at ../../src/tbb/semaphore.h:206
#3  commit_wait (c=<synthetic pointer>, this=0x27691ca0) at ../../src/rml/include/../server/thread_monitor.h:259
#4  tbb::internal::rml::private_worker::run (this=0x27691c80) at ../../src/tbb/private_server.cpp:277
#5  0x00007f4e5e41b519 in tbb::internal::rml::private_worker::thread_routine (arg=<optimized out>) at ../../src/tbb/private_server.cpp:223
#6  0x0000000015430aa1 in SNPSee_d9c72da67e7a1f57e9891545cd875e2719332304182309de ()
#7  0x00007f4e5e007ea5 in start_thread () from /lib64/libpthread.so.0
#8  0x00007f4e4ecfeb0d in clone () from /lib64/libc.so.6
Thread 27 (Thread 0x7f4e2d5f6700 (LWP 5018)):
#0  0x00007f4e4ecf8e29 in syscall () from /lib64/libc.so.6
#1  0x00007f4e5e41b4fa in futex_wait (comparand=2, futex=0x27691d2c) at ../../include/tbb/machine/linux_common.h:60
#2  P (this=0x27691d2c) at ../../src/tbb/semaphore.h:206
#3  commit_wait (c=<synthetic pointer>, this=0x27691d20) at ../../src/rml/include/../server/thread_monitor.h:259
#4  tbb::internal::rml::private_worker::run (this=0x27691d00) at ../../src/tbb/private_server.cpp:277
#5  0x00007f4e5e41b519 in tbb::internal::rml::private_worker::thread_routine (arg=<optimized out>) at ../../src/tbb/private_server.cpp:223
#6  0x0000000015430aa1 in SNPSee_d9c72da67e7a1f57e9891545cd875e2719332304182309de ()
#7  0x00007f4e5e007ea5 in start_thread () from /lib64/libpthread.so.0
#8  0x00007f4e4ecfeb0d in clone () from /lib64/libc.so.6
Thread 26 (Thread 0x7f4e2edf9700 (LWP 5019)):
#0  0x00007f4e4ecf8e29 in syscall () from /lib64/libc.so.6
#1  0x00007f4e5e41b4fa in futex_wait (comparand=2, futex=0x27691f2c) at ../../include/tbb/machine/linux_common.h:60
#2  P (this=0x27691f2c) at ../../src/tbb/semaphore.h:206
#3  commit_wait (c=<synthetic pointer>, this=0x27691f20) at ../../src/rml/include/../server/thread_monitor.h:259
#4  tbb::internal::rml::private_worker::run (this=0x27691f00) at ../../src/tbb/private_server.cpp:277
#5  0x00007f4e5e41b519 in tbb::internal::rml::private_worker::thread_routine (arg=<optimized out>) at ../../src/tbb/private_server.cpp:223
#6  0x0000000015430aa1 in SNPSee_d9c72da67e7a1f57e9891545cd875e2719332304182309de ()
#7  0x00007f4e5e007ea5 in start_thread () from /lib64/libpthread.so.0
#8  0x00007f4e4ecfeb0d in clone () from /lib64/libc.so.6
Thread 25 (Thread 0x7f4e2c5f4700 (LWP 5020)):
#0  0x00007f4e4ecf8e29 in syscall () from /lib64/libc.so.6
#1  0x00007f4e5e41b4fa in futex_wait (comparand=2, futex=0x276918ac) at ../../include/tbb/machine/linux_common.h:60
#2  P (this=0x276918ac) at ../../src/tbb/semaphore.h:206
#3  commit_wait (c=<synthetic pointer>, this=0x276918a0) at ../../src/rml/include/../server/thread_monitor.h:259
#4  tbb::internal::rml::private_worker::run (this=0x27691880) at ../../src/tbb/private_server.cpp:277
#5  0x00007f4e5e41b519 in tbb::internal::rml::private_worker::thread_routine (arg=<optimized out>) at ../../src/tbb/private_server.cpp:223
#6  0x0000000015430aa1 in SNPSee_d9c72da67e7a1f57e9891545cd875e2719332304182309de ()
#7  0x00007f4e5e007ea5 in start_thread () from /lib64/libpthread.so.0
#8  0x00007f4e4ecfeb0d in clone () from /lib64/libc.so.6
Thread 24 (Thread 0x7f4e2bdf3700 (LWP 5021)):
#0  0x00007f4e4ecf8e29 in syscall () from /lib64/libc.so.6
#1  0x00007f4e5e41b4fa in futex_wait (comparand=2, futex=0x276919ac) at ../../include/tbb/machine/linux_common.h:60
#2  P (this=0x276919ac) at ../../src/tbb/semaphore.h:206
#3  commit_wait (c=<synthetic pointer>, this=0x276919a0) at ../../src/rml/include/../server/thread_monitor.h:259
#4  tbb::internal::rml::private_worker::run (this=0x27691980) at ../../src/tbb/private_server.cpp:277
#5  0x00007f4e5e41b519 in tbb::internal::rml::private_worker::thread_routine (arg=<optimized out>) at ../../src/tbb/private_server.cpp:223
#6  0x0000000015430aa1 in SNPSee_d9c72da67e7a1f57e9891545cd875e2719332304182309de ()
#7  0x00007f4e5e007ea5 in start_thread () from /lib64/libpthread.so.0
#8  0x00007f4e4ecfeb0d in clone () from /lib64/libc.so.6
Thread 23 (Thread 0x7f4e2adf1700 (LWP 5024)):
#0  0x00007f4e4ecf8e29 in syscall () from /lib64/libc.so.6
#1  0x00007f4e5e41b4fa in futex_wait (comparand=2, futex=0x2769192c) at ../../include/tbb/machine/linux_common.h:60
#2  P (this=0x2769192c) at ../../src/tbb/semaphore.h:206
#3  commit_wait (c=<synthetic pointer>, this=0x27691920) at ../../src/rml/include/../server/thread_monitor.h:259
#4  tbb::internal::rml::private_worker::run (this=0x27691900) at ../../src/tbb/private_server.cpp:277
#5  0x00007f4e5e41b519 in tbb::internal::rml::private_worker::thread_routine (arg=<optimized out>) at ../../src/tbb/private_server.cpp:223
#6  0x0000000015430aa1 in SNPSee_d9c72da67e7a1f57e9891545cd875e2719332304182309de ()
#7  0x00007f4e5e007ea5 in start_thread () from /lib64/libpthread.so.0
#8  0x00007f4e4ecfeb0d in clone () from /lib64/libc.so.6
Thread 22 (Thread 0x7f4e2a5f0700 (LWP 5022)):
#0  0x00007f4e4ecf8e29 in syscall () from /lib64/libc.so.6
#1  0x00007f4e5e41b4fa in futex_wait (comparand=2, futex=0x276916ac) at ../../include/tbb/machine/linux_common.h:60
#2  P (this=0x276916ac) at ../../src/tbb/semaphore.h:206
#3  commit_wait (c=<synthetic pointer>, this=0x276916a0) at ../../src/rml/include/../server/thread_monitor.h:259
#4  tbb::internal::rml::private_worker::run (this=0x27691680) at ../../src/tbb/private_server.cpp:277
#5  0x00007f4e5e41b519 in tbb::internal::rml::private_worker::thread_routine (arg=<optimized out>) at ../../src/tbb/private_server.cpp:223
#6  0x0000000015430aa1 in SNPSee_d9c72da67e7a1f57e9891545cd875e2719332304182309de ()
#7  0x00007f4e5e007ea5 in start_thread () from /lib64/libpthread.so.0
#8  0x00007f4e4ecfeb0d in clone () from /lib64/libc.so.6
Thread 21 (Thread 0x7f4e2cdf5700 (LWP 5023)):
#0  0x00007f4e4ecf8e29 in syscall () from /lib64/libc.so.6
#1  0x00007f4e5e41b4fa in futex_wait (comparand=2, futex=0x27691aac) at ../../include/tbb/machine/linux_common.h:60
#2  P (this=0x27691aac) at ../../src/tbb/semaphore.h:206
#3  commit_wait (c=<synthetic pointer>, this=0x27691aa0) at ../../src/rml/include/../server/thread_monitor.h:259
#4  tbb::internal::rml::private_worker::run (this=0x27691a80) at ../../src/tbb/private_server.cpp:277
#5  0x00007f4e5e41b519 in tbb::internal::rml::private_worker::thread_routine (arg=<optimized out>) at ../../src/tbb/private_server.cpp:223
#6  0x0000000015430aa1 in SNPSee_d9c72da67e7a1f57e9891545cd875e2719332304182309de ()
#7  0x00007f4e5e007ea5 in start_thread () from /lib64/libpthread.so.0
#8  0x00007f4e4ecfeb0d in clone () from /lib64/libc.so.6
Thread 20 (Thread 0x7f4e295ee700 (LWP 5032)):
#0  0x00007f4e4ecf8e29 in syscall () from /lib64/libc.so.6
#1  0x00007f4e5e41b4fa in futex_wait (comparand=2, futex=0x276915ac) at ../../include/tbb/machine/linux_common.h:60
#2  P (this=0x276915ac) at ../../src/tbb/semaphore.h:206
#3  commit_wait (c=<synthetic pointer>, this=0x276915a0) at ../../src/rml/include/../server/thread_monitor.h:259
#4  tbb::internal::rml::private_worker::run (this=0x27691580) at ../../src/tbb/private_server.cpp:277
#5  0x00007f4e5e41b519 in tbb::internal::rml::private_worker::thread_routine (arg=<optimized out>) at ../../src/tbb/private_server.cpp:223
#6  0x0000000015430aa1 in SNPSee_d9c72da67e7a1f57e9891545cd875e2719332304182309de ()
#7  0x00007f4e5e007ea5 in start_thread () from /lib64/libpthread.so.0
#8  0x00007f4e4ecfeb0d in clone () from /lib64/libc.so.6
Thread 19 (Thread 0x7f4e2ddf7700 (LWP 5025)):
#0  0x00007f4e4ecf8e29 in syscall () from /lib64/libc.so.6
#1  0x00007f4e5e41b4fa in futex_wait (comparand=2, futex=0x27691bac) at ../../include/tbb/machine/linux_common.h:60
#2  P (this=0x27691bac) at ../../src/tbb/semaphore.h:206
#3  commit_wait (c=<synthetic pointer>, this=0x27691ba0) at ../../src/rml/include/../server/thread_monitor.h:259
#4  tbb::internal::rml::private_worker::run (this=0x27691b80) at ../../src/tbb/private_server.cpp:277
#5  0x00007f4e5e41b519 in tbb::internal::rml::private_worker::thread_routine (arg=<optimized out>) at ../../src/tbb/private_server.cpp:223
#6  0x0000000015430aa1 in SNPSee_d9c72da67e7a1f57e9891545cd875e2719332304182309de ()
#7  0x00007f4e5e007ea5 in start_thread () from /lib64/libpthread.so.0
#8  0x00007f4e4ecfeb0d in clone () from /lib64/libc.so.6
Thread 18 (Thread 0x7f4e28ded700 (LWP 5026)):
#0  0x00007f4e4ecf8e29 in syscall () from /lib64/libc.so.6
#1  0x00007f4e5e41b4fa in futex_wait (comparand=2, futex=0x2769172c) at ../../include/tbb/machine/linux_common.h:60
#2  P (this=0x2769172c) at ../../src/tbb/semaphore.h:206
#3  commit_wait (c=<synthetic pointer>, this=0x27691720) at ../../src/rml/include/../server/thread_monitor.h:259
#4  tbb::internal::rml::private_worker::run (this=0x27691700) at ../../src/tbb/private_server.cpp:277
#5  0x00007f4e5e41b519 in tbb::internal::rml::private_worker::thread_routine (arg=<optimized out>) at ../../src/tbb/private_server.cpp:223
#6  0x0000000015430aa1 in SNPSee_d9c72da67e7a1f57e9891545cd875e2719332304182309de ()
#7  0x00007f4e5e007ea5 in start_thread () from /lib64/libpthread.so.0
#8  0x00007f4e4ecfeb0d in clone () from /lib64/libc.so.6
Thread 17 (Thread 0x7f4e27deb700 (LWP 5027)):
#0  0x00007f4e4ecf8e29 in syscall () from /lib64/libc.so.6
#1  0x00007f4e5e41b4fa in futex_wait (comparand=2, futex=0x2769112c) at ../../include/tbb/machine/linux_common.h:60
#2  P (this=0x2769112c) at ../../src/tbb/semaphore.h:206
#3  commit_wait (c=<synthetic pointer>, this=0x27691120) at ../../src/rml/include/../server/thread_monitor.h:259
#4  tbb::internal::rml::private_worker::run (this=0x27691100) at ../../src/tbb/private_server.cpp:277
#5  0x00007f4e5e41b519 in tbb::internal::rml::private_worker::thread_routine (arg=<optimized out>) at ../../src/tbb/private_server.cpp:223
#6  0x0000000015430aa1 in SNPSee_d9c72da67e7a1f57e9891545cd875e2719332304182309de ()
#7  0x00007f4e5e007ea5 in start_thread () from /lib64/libpthread.so.0
#8  0x00007f4e4ecfeb0d in clone () from /lib64/libc.so.6
Thread 16 (Thread 0x7f4e2b5f2700 (LWP 5028)):
#0  0x00007f4e4ecf8e29 in syscall () from /lib64/libc.so.6
#1  0x00007f4e5e41b4fa in futex_wait (comparand=2, futex=0x276917ac) at ../../include/tbb/machine/linux_common.h:60
#2  P (this=0x276917ac) at ../../src/tbb/semaphore.h:206
#3  commit_wait (c=<synthetic pointer>, this=0x276917a0) at ../../src/rml/include/../server/thread_monitor.h:259
#4  tbb::internal::rml::private_worker::run (this=0x27691780) at ../../src/tbb/private_server.cpp:277
#5  0x00007f4e5e41b519 in tbb::internal::rml::private_worker::thread_routine (arg=<optimized out>) at ../../src/tbb/private_server.cpp:223
#6  0x0000000015430aa1 in SNPSee_d9c72da67e7a1f57e9891545cd875e2719332304182309de ()
#7  0x00007f4e5e007ea5 in start_thread () from /lib64/libpthread.so.0
#8  0x00007f4e4ecfeb0d in clone () from /lib64/libc.so.6
Thread 15 (Thread 0x7f4e265e8700 (LWP 5035)):
#0  0x00007f4e4ecf8e29 in syscall () from /lib64/libc.so.6
#1  0x00007f4e5e41b4fa in futex_wait (comparand=2, futex=0x2769182c) at ../../include/tbb/machine/linux_common.h:60
#2  P (this=0x2769182c) at ../../src/tbb/semaphore.h:206
#3  commit_wait (c=<synthetic pointer>, this=0x27691820) at ../../src/rml/include/../server/thread_monitor.h:259
#4  tbb::internal::rml::private_worker::run (this=0x27691800) at ../../src/tbb/private_server.cpp:277
#5  0x00007f4e5e41b519 in tbb::internal::rml::private_worker::thread_routine (arg=<optimized out>) at ../../src/tbb/private_server.cpp:223
#6  0x0000000015430aa1 in SNPSee_d9c72da67e7a1f57e9891545cd875e2719332304182309de ()
#7  0x00007f4e5e007ea5 in start_thread () from /lib64/libpthread.so.0
#8  0x00007f4e4ecfeb0d in clone () from /lib64/libc.so.6
Thread 14 (Thread 0x7f4e255e6700 (LWP 5039)):
#0  0x00007f4e4ecf8e29 in syscall () from /lib64/libc.so.6
#1  0x00007f4e5e41b4fa in futex_wait (comparand=2, futex=0x27691c2c) at ../../include/tbb/machine/linux_common.h:60
#2  P (this=0x27691c2c) at ../../src/tbb/semaphore.h:206
#3  commit_wait (c=<synthetic pointer>, this=0x27691c20) at ../../src/rml/include/../server/thread_monitor.h:259
#4  tbb::internal::rml::private_worker::run (this=0x27691c00) at ../../src/tbb/private_server.cpp:277
#5  0x00007f4e5e41b519 in tbb::internal::rml::private_worker::thread_routine (arg=<optimized out>) at ../../src/tbb/private_server.cpp:223
#6  0x0000000015430aa1 in SNPSee_d9c72da67e7a1f57e9891545cd875e2719332304182309de ()
#7  0x00007f4e5e007ea5 in start_thread () from /lib64/libpthread.so.0
#8  0x00007f4e4ecfeb0d in clone () from /lib64/libc.so.6
Thread 13 (Thread 0x7f4e285ec700 (LWP 5040)):
#0  0x00007f4e4ecf8e29 in syscall () from /lib64/libc.so.6
#1  0x00007f4e5e41b4fa in futex_wait (comparand=2, futex=0x276914ac) at ../../include/tbb/machine/linux_common.h:60
#2  P (this=0x276914ac) at ../../src/tbb/semaphore.h:206
#3  commit_wait (c=<synthetic pointer>, this=0x276914a0) at ../../src/rml/include/../server/thread_monitor.h:259
#4  tbb::internal::rml::private_worker::run (this=0x27691480) at ../../src/tbb/private_server.cpp:277
#5  0x00007f4e5e41b519 in tbb::internal::rml::private_worker::thread_routine (arg=<optimized out>) at ../../src/tbb/private_server.cpp:223
#6  0x0000000015430aa1 in SNPSee_d9c72da67e7a1f57e9891545cd875e2719332304182309de ()
#7  0x00007f4e5e007ea5 in start_thread () from /lib64/libpthread.so.0
#8  0x00007f4e4ecfeb0d in clone () from /lib64/libc.so.6
Thread 12 (Thread 0x7f4e275ea700 (LWP 5043)):
#0  0x00007f4e4ecf8e29 in syscall () from /lib64/libc.so.6
#1  0x00007f4e5e41b4fa in futex_wait (comparand=2, futex=0x27691b2c) at ../../include/tbb/machine/linux_common.h:60
#2  P (this=0x27691b2c) at ../../src/tbb/semaphore.h:206
#3  commit_wait (c=<synthetic pointer>, this=0x27691b20) at ../../src/rml/include/../server/thread_monitor.h:259
#4  tbb::internal::rml::private_worker::run (this=0x27691b00) at ../../src/tbb/private_server.cpp:277
#5  0x00007f4e5e41b519 in tbb::internal::rml::private_worker::thread_routine (arg=<optimized out>) at ../../src/tbb/private_server.cpp:223
#6  0x0000000015430aa1 in SNPSee_d9c72da67e7a1f57e9891545cd875e2719332304182309de ()
#7  0x00007f4e5e007ea5 in start_thread () from /lib64/libpthread.so.0
#8  0x00007f4e4ecfeb0d in clone () from /lib64/libc.so.6
Thread 11 (Thread 0x7f4e29def700 (LWP 5044)):
#0  0x00007f4e4ecf8e29 in syscall () from /lib64/libc.so.6
#1  0x00007f4e5e41b4fa in futex_wait (comparand=2, futex=0x27691a2c) at ../../include/tbb/machine/linux_common.h:60
#2  P (this=0x27691a2c) at ../../src/tbb/semaphore.h:206
#3  commit_wait (c=<synthetic pointer>, this=0x27691a20) at ../../src/rml/include/../server/thread_monitor.h:259
#4  tbb::internal::rml::private_worker::run (this=0x27691a00) at ../../src/tbb/private_server.cpp:277
#5  0x00007f4e5e41b519 in tbb::internal::rml::private_worker::thread_routine (arg=<optimized out>) at ../../src/tbb/private_server.cpp:223
#6  0x0000000015430aa1 in SNPSee_d9c72da67e7a1f57e9891545cd875e2719332304182309de ()
#7  0x00007f4e5e007ea5 in start_thread () from /lib64/libpthread.so.0
#8  0x00007f4e4ecfeb0d in clone () from /lib64/libc.so.6
Thread 10 (Thread 0x7f4e25de7700 (LWP 5045)):
#0  0x00007f4e4ecf8e29 in syscall () from /lib64/libc.so.6
#1  0x00007f4e5e41b4fa in futex_wait (comparand=2, futex=0x276912ac) at ../../include/tbb/machine/linux_common.h:60
#2  P (this=0x276912ac) at ../../src/tbb/semaphore.h:206
#3  commit_wait (c=<synthetic pointer>, this=0x276912a0) at ../../src/rml/include/../server/thread_monitor.h:259
#4  tbb::internal::rml::private_worker::run (this=0x27691280) at ../../src/tbb/private_server.cpp:277
#5  0x00007f4e5e41b519 in tbb::internal::rml::private_worker::thread_routine (arg=<optimized out>) at ../../src/tbb/private_server.cpp:223
#6  0x0000000015430aa1 in SNPSee_d9c72da67e7a1f57e9891545cd875e2719332304182309de ()
#7  0x00007f4e5e007ea5 in start_thread () from /lib64/libpthread.so.0
#8  0x00007f4e4ecfeb0d in clone () from /lib64/libc.so.6
Thread 9 (Thread 0x7f4e26de9700 (LWP 5046)):
#0  0x00007f4e4ecf8e29 in syscall () from /lib64/libc.so.6
#1  0x00007f4e5e41b4fa in futex_wait (comparand=2, futex=0x276913ac) at ../../include/tbb/machine/linux_common.h:60
#2  P (this=0x276913ac) at ../../src/tbb/semaphore.h:206
#3  commit_wait (c=<synthetic pointer>, this=0x276913a0) at ../../src/rml/include/../server/thread_monitor.h:259
#4  tbb::internal::rml::private_worker::run (this=0x27691380) at ../../src/tbb/private_server.cpp:277
#5  0x00007f4e5e41b519 in tbb::internal::rml::private_worker::thread_routine (arg=<optimized out>) at ../../src/tbb/private_server.cpp:223
#6  0x0000000015430aa1 in SNPSee_d9c72da67e7a1f57e9891545cd875e2719332304182309de ()
#7  0x00007f4e5e007ea5 in start_thread () from /lib64/libpthread.so.0
#8  0x00007f4e4ecfeb0d in clone () from /lib64/libc.so.6
Thread 8 (Thread 0x7f4e245e4700 (LWP 5047)):
#0  0x00007f4e4ecf8e29 in syscall () from /lib64/libc.so.6
#1  0x00007f4e5e41b4fa in futex_wait (comparand=2, futex=0x2769162c) at ../../include/tbb/machine/linux_common.h:60
#2  P (this=0x2769162c) at ../../src/tbb/semaphore.h:206
#3  commit_wait (c=<synthetic pointer>, this=0x27691620) at ../../src/rml/include/../server/thread_monitor.h:259
#4  tbb::internal::rml::private_worker::run (this=0x27691600) at ../../src/tbb/private_server.cpp:277
#5  0x00007f4e5e41b519 in tbb::internal::rml::private_worker::thread_routine (arg=<optimized out>) at ../../src/tbb/private_server.cpp:223
#6  0x0000000015430aa1 in SNPSee_d9c72da67e7a1f57e9891545cd875e2719332304182309de ()
#7  0x00007f4e5e007ea5 in start_thread () from /lib64/libpthread.so.0
#8  0x00007f4e4ecfeb0d in clone () from /lib64/libc.so.6
Thread 7 (Thread 0x7f4e24de5700 (LWP 5049)):
#0  0x00007f4e4ecf8e29 in syscall () from /lib64/libc.so.6
#1  0x00007f4e5e41b4fa in futex_wait (comparand=2, futex=0x276911ac) at ../../include/tbb/machine/linux_common.h:60
#2  P (this=0x276911ac) at ../../src/tbb/semaphore.h:206
#3  commit_wait (c=<synthetic pointer>, this=0x276911a0) at ../../src/rml/include/../server/thread_monitor.h:259
#4  tbb::internal::rml::private_worker::run (this=0x27691180) at ../../src/tbb/private_server.cpp:277
#5  0x00007f4e5e41b519 in tbb::internal::rml::private_worker::thread_routine (arg=<optimized out>) at ../../src/tbb/private_server.cpp:223
#6  0x0000000015430aa1 in SNPSee_d9c72da67e7a1f57e9891545cd875e2719332304182309de ()
#7  0x00007f4e5e007ea5 in start_thread () from /lib64/libpthread.so.0
#8  0x00007f4e4ecfeb0d in clone () from /lib64/libc.so.6
Thread 6 (Thread 0x7f4e235e2700 (LWP 5051)):
#0  0x00007f4e4ecf8e29 in syscall () from /lib64/libc.so.6
#1  0x00007f4e5e41b4fa in futex_wait (comparand=2, futex=0x2769132c) at ../../include/tbb/machine/linux_common.h:60
#2  P (this=0x2769132c) at ../../src/tbb/semaphore.h:206
#3  commit_wait (c=<synthetic pointer>, this=0x27691320) at ../../src/rml/include/../server/thread_monitor.h:259
#4  tbb::internal::rml::private_worker::run (this=0x27691300) at ../../src/tbb/private_server.cpp:277
#5  0x00007f4e5e41b519 in tbb::internal::rml::private_worker::thread_routine (arg=<optimized out>) at ../../src/tbb/private_server.cpp:223
#6  0x0000000015430aa1 in SNPSee_d9c72da67e7a1f57e9891545cd875e2719332304182309de ()
#7  0x00007f4e5e007ea5 in start_thread () from /lib64/libpthread.so.0
#8  0x00007f4e4ecfeb0d in clone () from /lib64/libc.so.6
Thread 5 (Thread 0x7f4e22de1700 (LWP 5048)):
#0  0x00007f4e4ecf8e29 in syscall () from /lib64/libc.so.6
#1  0x00007f4e5e41b4fa in futex_wait (comparand=2, futex=0x2769152c) at ../../include/tbb/machine/linux_common.h:60
#2  P (this=0x2769152c) at ../../src/tbb/semaphore.h:206
#3  commit_wait (c=<synthetic pointer>, this=0x27691520) at ../../src/rml/include/../server/thread_monitor.h:259
#4  tbb::internal::rml::private_worker::run (this=0x27691500) at ../../src/tbb/private_server.cpp:277
#5  0x00007f4e5e41b519 in tbb::internal::rml::private_worker::thread_routine (arg=<optimized out>) at ../../src/tbb/private_server.cpp:223
#6  0x0000000015430aa1 in SNPSee_d9c72da67e7a1f57e9891545cd875e2719332304182309de ()
#7  0x00007f4e5e007ea5 in start_thread () from /lib64/libpthread.so.0
#8  0x00007f4e4ecfeb0d in clone () from /lib64/libc.so.6
Thread 4 (Thread 0x7f4e23de3700 (LWP 5050)):
#0  0x00007f4e4ecf8e29 in syscall () from /lib64/libc.so.6
#1  0x00007f4e5e41b4fa in futex_wait (comparand=2, futex=0x2769142c) at ../../include/tbb/machine/linux_common.h:60
#2  P (this=0x2769142c) at ../../src/tbb/semaphore.h:206
#3  commit_wait (c=<synthetic pointer>, this=0x27691420) at ../../src/rml/include/../server/thread_monitor.h:259
#4  tbb::internal::rml::private_worker::run (this=0x27691400) at ../../src/tbb/private_server.cpp:277
#5  0x00007f4e5e41b519 in tbb::internal::rml::private_worker::thread_routine (arg=<optimized out>) at ../../src/tbb/private_server.cpp:223
#6  0x0000000015430aa1 in SNPSee_d9c72da67e7a1f57e9891545cd875e2719332304182309de ()
#7  0x00007f4e5e007ea5 in start_thread () from /lib64/libpthread.so.0
#8  0x00007f4e4ecfeb0d in clone () from /lib64/libc.so.6
Thread 3 (Thread 0x7f4e225e0700 (LWP 5053)):
#0  0x00007f4e4ecf8e29 in syscall () from /lib64/libc.so.6
#1  0x00007f4e5e41b4fa in futex_wait (comparand=2, futex=0x2769122c) at ../../include/tbb/machine/linux_common.h:60
#2  P (this=0x2769122c) at ../../src/tbb/semaphore.h:206
#3  commit_wait (c=<synthetic pointer>, this=0x27691220) at ../../src/rml/include/../server/thread_monitor.h:259
#4  tbb::internal::rml::private_worker::run (this=0x27691200) at ../../src/tbb/private_server.cpp:277
#5  0x00007f4e5e41b519 in tbb::internal::rml::private_worker::thread_routine (arg=<optimized out>) at ../../src/tbb/private_server.cpp:223
#6  0x0000000015430aa1 in SNPSee_d9c72da67e7a1f57e9891545cd875e2719332304182309de ()
#7  0x00007f4e5e007ea5 in start_thread () from /lib64/libpthread.so.0
#8  0x00007f4e4ecfeb0d in clone () from /lib64/libc.so.6
Thread 2 (Thread 0x7f4e21ddf700 (LWP 5054)):
#0  0x00007f4e5e00ba35 in pthread_cond_wait@@GLIBC_2.3.2 () from /lib64/libpthread.so.0
#1  0x00007f4e55ec22e3 in QWaitCondition::wait(QMutex*, unsigned long) () from /opt/synopsys/icc2/O-2018.06-SP1/linux64/nwtn/bin/../shlib/libQt5Core.so.5
#2  0x00007f4e55ebdb19 in ?? () from /opt/synopsys/icc2/O-2018.06-SP1/linux64/nwtn/bin/../shlib/libQt5Core.so.5
#3  0x00007f4e55ec1583 in ?? () from /opt/synopsys/icc2/O-2018.06-SP1/linux64/nwtn/bin/../shlib/libQt5Core.so.5
#4  0x0000000015430aa1 in SNPSee_d9c72da67e7a1f57e9891545cd875e2719332304182309de ()
#5  0x00007f4e5e007ea5 in start_thread () from /lib64/libpthread.so.0
#6  0x00007f4e4ecfeb0d in clone () from /lib64/libc.so.6
Thread 1 (Thread 0x7f4e5f292e40 (LWP 4585)):
#0  0x00007f4e5e00f1d9 in waitpid () from /lib64/libpthread.so.0
#1  0x000000000702b34b in SNPSee_9ea8dbbd5e74784447e693058ff24d3ffe3b7927ff35ac62eec4782670afaff6 ()
#2  0x000000000702c935 in SNPSee_9ea8dbbd5e74784484d3cce2fced02c05a3783bc3b9f8fad6989ef886e673ad9 ()
#3  <signal handler called>
#4  0x00007f4e4ec36387 in raise () from /lib64/libc.so.6
#5  0x00007f4e4ec37a78 in abort () from /lib64/libc.so.6
#6  0x000000000702be67 in SNPSee_9ea8dbbd5e747844156e8ae436ccb47f39c9de9372d2c61fb47af744c94941479837ebe21775c597 ()
#7  0x0000000000532804 in SNPSee_efc2829fa201a7c11430a6b4132edd23025c179fb82c8aa46b3593d2713fb41ae913e007264ed7b6a0640553a4c1b03efbe65e411c81c456a6db07302e1bb680a5f176a571e2412827f52d3ae4cd62e4a0a10f1e4e072d57 ()
#8  0x00000000122b301e in SNPSee_7b2bf591df91ccb66dda06eb24abf5de08927243a4e02c463e12a7a37e5de2ad57f569de2c92f0c64ab6c278e490ce2e85871101d6a39de31e4e98e3cfe935aa8ca1a91a516ee7636672ef650863e200 ()
#9  0x000000001720c74b in SNPSee_8aaa6b44cc7639fec6d6930829448deb ()
#10 0x0000000016ffe223 in SNPSee_83df875961c51f3dfe691314fa1191abc33608c1e3b67f3f1dbb849b7ad1d23f786d9746150712eba3de012d5e8a66d98e37acd653be5fc03ab34ede12ac37330f925316dd7485287546061900688db48c8c2a79283f13877cb42badbc6921a7 ()
#11 0x000000001700d7ff in SNPSee_83df875961c51f3dc6223ae0fa860b411e5452b87cdf8592c5dc6fbb3fe43f2b8b86a52565e722afa24c8fa5dc0ef3cec8943c0cbdf286f45a2d6970e941e49524a4e21639356b3e35fe3d5e1acfc30ef223fb2b69211df5cb029cf20977376d6fd4171f05ebdf28a6366ec2b3168135a4afe4d7d4978982a76a95abd6b6dabcf98bd3f25f3d88eb ()
#12 0x000000001700e167 in SNPSee_83df875961c51f3dc6223ae0fa860b411e5452b87cdf8592c5dc6fbb3fe43f2b8b86a52565e722afa24c8fa5dc0ef3ceb3ce8d8aa6c9e3d4a91ed67a54ab1316786ed9ed464f83bb8f3ee43727163cc73dbbac2113035ed6bd47415f5ade1332459e05c79fb602c59666ba3e9f9d648ec2da2f6ab43f998ab6858f943e77a797464b1b9bec26fcf5 ()
#13 0x000000001700e35d in SNPSee_83df875961c51f3dc6223ae0fa860b411e5452b87cdf8592c5dc6fbb3fe43f2b8b86a52565e722afa24c8fa5dc0ef3ceb3ce8d8aa6c9e3d4a91ed67a54ab1316786ed9ed464f83bb8f3ee43727163cc73dbbac2113035ed6bd47415f5ade1332c811568706c586f0 ()
#14 0x000000001700eb41 in SNPSee_83df875961c51f3d570a7ffec36f512262e6a6e04721991949d5cd1d41c00cb25d645d932decfc7a5ebe448db39a7d993415e47659dff3a664f28c0509af241fe086083045b2bed06d7947bf081d75f41441a979777046dc ()
#15 0x000000001700f0a1 in SNPSee_83df875961c51f3db2b7f5253c2dc02e646031437a4dd4d600fab27ba47e95854014764ee379f1784e01ee4b62a25988df49fc668d94028e47266a2c37dd9fe3627c3e080d708df555f7305c2eb3524fa022696fc0878783115a906c55029496 ()
#16 0x0000000016fe2643 in SNPSee_83df875961c51f3d3def17f3bd77c3a8d8f8c39d2d4f52d84b9dcd024cd86c0f500df88aa9f1164fde8fd317555d8fecd0747db9c4c333f84d4b7bc50d94c86a4a83ccaddbe5791ced9105829769fb81 ()
#17 0x0000000016d79ab3 in SNPSee_e59868f69115736a670c0a7773d917c8aabb75eb028d81b78657cd28e09a789a9f1a26ff007f93cd77cfffd0d6a05ab4f7580b6fc4994a4c361d35ccd7e2b6d04e3911230bc21c9a98edff149c51e878cabdcbecddf301eb08b3b068823ac8b1 ()
#18 0x0000000016d81c96 in SNPSee_e59868f69115736a670c0a7773d917c8b6b87f4b6c3ec7eb9bc16a63d7a6b96b2b0943fea626c168a832dc9c3546b2f42533ca2cc9e4935b16cf02e15d054f3cd99b3ef9eea1ea9ad83877b8f075cac8abe38b7aa909a92353dbcffcf6531f1f ()
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#39 0x0000000015e0395d in SNPSee_1c61c950c93d6db4 ()
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#68 0x00007f4e560bc656 in QMetaObject::activate(QObject*, int, int, void**) () from /opt/synopsys/icc2/O-2018.06-SP1/linux64/nwtn/bin/../shlib/libQt5Core.so.5
#69 0x00007f4e561350dd in QSocketNotifier::activated(int, QSocketNotifier:PrivateSignal) () from /opt/synopsys/icc2/O-2018.06-SP1/linux64/nwtn/bin/../shlib/libQt5Core.so.5
#70 0x00007f4e560c8cc3 in QSocketNotifier::event(QEvent*) () from /opt/synopsys/icc2/O-2018.06-SP1/linux64/nwtn/bin/../shlib/libQt5Core.so.5
#71 0x00007f4e5837b80c in QApplicationPrivate::notify_helper(QObject*, QEvent*) () from /opt/synopsys/icc2/O-2018.06-SP1/linux64/nwtn/bin/../shlib/libQt5Widgets.so.5
#72 0x00007f4e58380bb2 in QApplication::notify(QObject*, QEvent*) () from /opt/synopsys/icc2/O-2018.06-SP1/linux64/nwtn/bin/../shlib/libQt5Widgets.so.5
#73 0x000000000953241c in SNPSee_9886f32bf8214536ec9f95d3ed3c7f5e64ba1872850550598ca741cdfb68659679bafee2b9707c59 ()
#74 0x00007f4e56090b38 in QCoreApplication::notifyInternal2(QObject*, QEvent*) () from /opt/synopsys/icc2/O-2018.06-SP1/linux64/nwtn/bin/../shlib/libQt5Core.so.5
#75 0x00007f4e560e1a87 in QEventDispatcherUNIX::activateSocketNotifiers() () from /opt/synopsys/icc2/O-2018.06-SP1/linux64/nwtn/bin/../shlib/libQt5Core.so.5
#76 0x00007f4e560e1f6d in QEventDispatcherUNIXPrivate::doSelect(QFlags<QEventLoop:rocessEventsFlag>, timespec*) () from /opt/synopsys/icc2/O-2018.06-SP1/linux64/nwtn/bin/../shlib/libQt5Core.so.5
#77 0x00007f4e560e234a in QEventDispatcherUNIX::processEvents(QFlags<QEventLoop:rocessEventsFlag>) () from /opt/synopsys/icc2/O-2018.06-SP1/linux64/nwtn/bin/../shlib/libQt5Core.so.5
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#84 0x00007f4e56097108 in QCoreApplication::exec() () from /opt/synopsys/icc2/O-2018.06-SP1/linux64/nwtn/bin/../shlib/libQt5Core.so.5
#85 0x000000000946f037 in SNPSee_b81f4656f0d7d3ca1b0bca755b60caea2cb50375ef5e9df280c2a7ba1e2ca19f7750e3d580600edd04a01dc4363d697fcd6b18c4d0ab558c ()
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#87 0x000000000055ba31 in SNPSee_6188b3f9a7e769c7eb2dc22ab181ff5c0260e7bf3c6e6c5b6dd310362dd3e58b19a33122e2a80c1014bca5a076370ba0686492d474ef148ca36ababef5945158a888f7e536545deca4d0228e032d0cd6 ()
#88 0x000000000055d88c in SNPSee_5a24f30b88271223 ()
#89 0x00007f4e4ec22555 in __libc_start_main () from /lib64/libc.so.6
#90 0x0000000000f1238d in SNPSee_d06eed713327be76 ()

The tool has just encountered a fatal error:

If you encountered this fatal error when using the most recent
Synopsys release, submit the above stack trace and a test case that
reproduces the problem to the Synopsys Support Center by using
Enter A Call at http://solvnet.synopsys.com/EnterACall.

* For information about the latest software releases, go to the Synopsys
  SolvNet Release Library at http://solvnet.synopsys.com/ReleaseLibrary.

* For information about required Operating System patches, go to
  http://www.synopsys.com/support


Fatal: Internal system error, cannot recover.
Error code=6

Release = 'O-2018.06-SP1'  Architecture = 'linux64'  Program = 'IC Compiler II'
Exec = '/opt/synopsys/icc2/O-2018.06-SP1/linux64/nwtn/bin/dgcom_exec'

'117621967 139974561297968 139974305604487 139974305610360 117620327 5449732 304820254 388024139 385868323 385931263 385933671 385934173 385936193 385937569 385754691 383228595 383261846 378952256 379100567 379104574 386537835 380226176 380228885 380329470 380364135 379420737 379448791 379455363 379498172 379500903 378701419 373833068'

A snapshot of runtime data has been captured in /home/liuchang/workspace/icc2_learn/crte_000004585.txt
/opt/synopsys/icc2/O-2018.06-SP1/bin/icc2_shell: line 359:  4585 Aborted                 (core dumped) ${REAL_EXEC_NAME} -root_path ${SYNOPSYS_ROOT} ${ARGS}

huw

这是小弟跑cts时的脚本
set active_scenarios "normal.setup"
set_scenario_status -active false [get_scenarios -filter active]
set_scenario_status -active true $active_scenarios
current_scenario normal.setup

####ndr

create_routing_rule clock_trunk -default_reference_rule \
                                -widths {M1 0.04 M2 0.04 M3 0.04 M4 0.04 M5 0.08 M6 0.08 M7 0.08} \
                                -spacings {M1 0.04 M2 0.04 M3 0.04 M4 0.04 M5 0.08 M6 0.08 M7 0.08} \
                                -spacing_length_thresholds {M1 0.3 M2 0.3 M3 0.3 M4 0.3 M5 0.3 M6 0.3 M7 0.3}

create_routing_rule clock_leaf  -default_reference_rule \
                                -widths {M1 0.04 M2 0.04 M3 0.04 M4 0.04 M5 0.04 M6 0.04 M7 0.04} \
                                -spacings {M1 0.04 M2 0.04 M3 0.04 M4 0.04 M5 0.08 M6 0.08 M7 0.08} \
                                -spacing_length_thresholds {M1 0.3 M2 0.3 M3 0.3 M4 0.3 M5 0.3 M6 0.3 M7 0.3}                              

set_clock_routing_rules -net_type root -rules clock_trunk -min_routing_layer M4 -max_routing_layer M7
set_clock_routing_rules -net_type internal -rules clock_trunk -min_routing_layer M4 -max_routing_layer M7
set_clock_routing_rules -net_type sink -rules clock_trunk -min_routing_layer M4 -max_routing_layer M7

set cts_cell_list [list \
*/CLKINV1_96S7P5T24R \
*/CLKINV2_96S7P5T24R \
*/CLKINV4_96S7P5T24R \
*/CLKINV6_96S7P5T24R \
*/CLKINV8_96S7P5T24R \
]

set_lib_cell_purpose -exclude cts [get_lib_cells -quiet */*]
set_lib_cell_purpose -include cts [get_lib_cells -quiet $cts_cell_list]

set_app_options -list {cts.common.verbose 1}
set_app_options -list {cts.common.max_fanout 8}
set_app_options -list {cts.common.max_net_length 50}
set_clock_tree_options -target_skew 0.080 -clocks [get_clocks *] -corners wc

#remove_dont_touch [get_nets clk]

clock_opt -from build_clock -to build_clock
clock_opt -from route_clock -to route_clock
跑到 clock_opt -from route_clock -to route_clock 这条指令时就会报错

huw

顶顶

huw

求大佬解答