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【Morgan Kaufmann 2007新书】System-on-Chip Test Architectures

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发表于 2008-2-29 00:10:09 | 显示全部楼层 |阅读模式

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System-on-Chip Test Architectures (Systems on Silicon)
by Laung-Terng Wang, Charles E. Stroud, Nur A. Touba  


                               
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[size=120%]System-on-Chip Test Architectures (Systems on Silicon)
By Laung-Terng Wang, Charles E. Stroud, Nur A. Touba


Publisher:   Morgan Kaufmann
Number Of Pages:   896
Publication Date:   2007-11-16
ISBN-10 / ASIN:   012373973X
ISBN-13 / EAN:   9780123739735
Binding:   Hardcover


Book Description:
Modern electronics testing has a legacy of more than 40 years. The introduction of new technologies, especially nanometer technologies with 90nm or smaller geometry, has allowed the semiconductor industry to keep pace with the increased performance-capacity demands from consumers. As a result, semiconductor test costs have been growing steadily and typically amount to 40% of today?s overall product cost.

This book is a comprehensive guide to new VLSI Testing and Design-for-Testability techniques that will allow students, researchers, DFT practitioners, and VLSI designers to master quickly System-on-Chip Test architectures, for test debug and diagnosis of digital, memory, and analog/mixed-signal designs.

KEY FEATURES
* Emphasizes VLSI Test principles and Design for Testability architectures, with numerous illustrations/examples.
* Most up-to-date coverage available, including Fault Tolerance, Low-Power Testing, Defect and Error Tolerance, Network-on-Chip (NOC) Testing, Software-Based Self-Testing, FPGA Testing, MEMS Testing, and System-In-Package (SIP) Testing, which are not yet available in any testing book.
* Covers the entire spectrum of VLSI testing and DFT architectures, from digital and analog, to memory circuits, and fault diagnosis and self-repair from digital to memory circuits.
* Discusses future nanotechnology test trends and challenges facing the nanometer design era; promising nanotechnology test techniques, including Quantum-Dots, Cellular Automata, Carbon-Nanotubes, and Hybrid Semiconductor/Nanowire/Molecular Computing.
* Practical problems at the end of each chapter for students.

[ 本帖最后由 benemale 于 2008-2-29 00:14 编辑 ]

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发表于 2008-2-29 01:10:27 | 显示全部楼层
谢了啊, 不错啊。
发表于 2008-2-29 09:25:51 | 显示全部楼层
楼主又开始发书了 太强了!
发表于 2008-2-29 09:40:02 | 显示全部楼层
支持楼主,感谢楼主!
发表于 2008-2-29 12:19:08 | 显示全部楼层
看看还是可以的
发表于 2008-2-29 12:56:44 | 显示全部楼层
楼主又发新书了,看看
发表于 2008-2-29 13:04:53 | 显示全部楼层
现在速度实在是太慢了
发表于 2008-2-29 13:14:57 | 显示全部楼层
不错,多谢分享
发表于 2008-2-29 16:12:36 | 显示全部楼层
网速怎么这么慢啊?
发表于 2008-2-29 16:53:05 | 显示全部楼层
thank you very much
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