ESD papers link

jian1712

14年前发在Analog/IC设计版的帖子，那时还没ESD版块，搬过来供ESD&LU同行下载和参考。 THE IMPACT OF INNER PICKUP ON ESD ROBUSTNESS OF MULTI-FINGER NMOS http://www.eetop.cn/bbs/thread-231685-1-1.html Improvement method of the machine-model ESD robustness for a smart power IC http://www.eetop.cn/bbs/thread-235223-1-1.html on-chip ESD protection design with substrate-triggering technique http://www.eetop.cn/bbs/thread-231692-1-1.html Investigation on seal-ring rules for IC product reliability in 0.25-um CMOS technology http://www.eetop.cn/bbs/thread-231687-1-1.html Chip-level and board-level CDM ESD tests on IC products(Ming-Dou Ker) http://www.eetop.cn/bbs/thread-206405-1-1.html New layout scheme to improve ESD robustness of IO buffers in fully-silicided CMOS process(Ming-Dou Ker  ) http://www.eetop.cn/bbs/thread-206403-1-1.html A Novel Gate-Coupled SCR ESD Protection Structure http://www.eetop.cn/bbs/thread-206397-1-1.html ESD protection solutions for high voltage technologies.pdf http://www.eetop.cn/bbs/thread-254145-1-1.html