求助DC create_generated_clock

ICstudy_zhao

在写DC 约束中，compile 过后，会报出：


Warning: A non-unate path in clock network for clock 'LRCK'
from pin 'U_I2S_RX_INF/U118/ZN' is detected. (TIM-052)
Warning: sense defined on pin 'U_I2S_RX_INF/U32/ZN' cannot be honored for clock 'LRCK'.  (TIM-190)
Warning: sense defined on pin 'U_I2S_RX_INF/U31/ZN' cannot be honored for clock 'LRCK'.  (TIM-190)
Warning: A non-unate path in clock network for clock 'IrClk_d1'
from pin 'U_I2S_RX_INF/U118/ZN' is detected. (TIM-052)
Warning: sense defined on pin 'U_I2S_RX_INF/U32/ZN' cannot be honored for clock 'IrClk_d1'.  (TIM-190)
Warning: sense defined on pin 'U_I2S_RX_INF/U31/ZN' cannot be honored for clock 'IrClk_d1'.  (TIM-190)

这些错误应该如何处理，
本人是新手，碰到这些节点的warning，认为是自己的约束的timing path 不完善，想请教一下，create_generated_clock是什么场景需要用，是说CLK信号走到MUX ，DFF,都要进行解释声明吗？怎么避免这些warning？

ICstudy_zhao

自己支持一下