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Seong Chew, Lim
Integrated Circuit Design Services Sdn. Bhd.
seongchew.lim@icdsgroup.com
ABSTRACT
Using Synopsys Astro place n route tool for ASIC physical design flow is presented in this paper. The paper will introduce the Astro methodology flow from synthesized netlist to gds. The paper will cover Design database setup, floorplan, power pre-route, placement, clock tree synthesis, and route phases. This paper will also cover some of the physical design sharing like power pre-route pattern and scripts that being used for physical design and also some introductions on the clock timing. The paper will not cover topics like IR drop, Power Leakage and Cross Talk issues that are critical to the UDSM design. |
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ASTRO.pdf
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发表于 2008-2-4 16:09:48
