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| Closing the Power Gap between ASIC & Custom
Tools and Techniques for Low Power Design
Chinnery, David, Keutzer, Kurt
2007, XII, 388 p. 138 illus., Hardcover
ISBN: 978-0-387-25763-1
This item usually ships in 2-3 business days
| $129.00
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About this book
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Table of contents
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Sample pages
About this book
- Will cover how to use low power design in an automated design flow, and examine the design time and performance trade-offs
- Includes the latest tools and techniques for low power design applied in an ASIC design flow
- Focuses on low power in an automated design methodology; a much neglected area
This book carefully details design tools and techniques for realizing low power and energy efficiency in a highly productive design methodology.
Important topics include:
- Microarchitectural techniques to reduce energy per operation
- Power reduction with timing slack from pipelining
- Analysis of the benefits of using multiple supply and threshold voltages
- Placement techniques for multiple supply voltages
- Verification for multiple voltage domains
- Improved algorithms for gate sizing, and assignment of supply and threshold voltages
- Power gating design automation to reduce leakage
- Relationships among statistical timing, power analysis, and parametric yield optimization
Design examples illustrate that these techniques can improve energy efficiency by two to three times.
Written for:
Circuit design engineers and researchers
[ 本帖最后由 benemale 于 2008-1-26 10:34 编辑 ] |
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