TSMC28 innovus DRC 求助

朱斯提提亚 · 发表于 2023-8-3 15:46:53

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新人求助，如下是我写的placement有关的命令

setPlaceMode -place_detail_legalization_inst_gap 9
setPlaceMode -place_global_uniform_density true
#setPlaceMode -place_global_sdp_alignment true
setPlaceMode -place_detail_use_check_drc true

setUsefulSkewMode -maxSkew false -noBoundary false -useCells {BUFFD0P7BWP35P140HVT BUFFD0BWP35P140HVT BUFFD12BWP35P140HVT BUFFD16BWP35P140HVT BUFFD1BWP35P140HVT BUFFD1P5BWP35P140HVT BUFFD2BWP35P140HVT BUFFD3BWP35P140HVT BUFFD4BWP35P140HVT BUFFD6BWP35P140HVT BUFFD8BWP35P140HVT CKBD1BWP35P140HVT CKBD0BWP35P140HVT CKBD12BWP35P140HVT CKBD16BWP35P140HVT CKBD2BWP35P140HVT CKBD3BWP35P140HVT CKBD4BWP35P140HVT CKBD6BWP35P140HVT CKBD8BWP35P140HVT INVD0P7BWP35P140HVT INVD0BWP35P140HVT INVD12BWP35P140HVT INVD15BWP35P140HVT INVD16BWP35P140HVT INVD18BWP35P140HVT INVD1BWP35P140HVT INVD2BWP35P140HVT INVD1P5BWP35P140HVT INVD3BWP35P140HVT INVD4BWP35P140HVT INVD6BWP35P140HVT INVD8BWP35P140HVT INVD9BWP35P140HVT CKND1BWP35P140HVT CKND0BWP35P140HVT CKND12BWP35P140HVT CKND16BWP35P140HVT CKND2BWP35P140HVT CKND3BWP35P140HVT CKND4BWP35P140HVT CKND6BWP35P140HVT CKND8BWP35P140HVT} -maxAllowedDelay 0.2
place_opt_design

然后最后网表导入virtuoso后，placement的不对带来了以下几种drc：

PO.W.1

PO.W.3

PO.W.20__PO.S.44：

这看起来应该是stdcell纵向没对齐，横向间距过大或过小造成的，请问应该怎么解决啊？

fenger2038 · 发表于 2023-8-9 15:00:59

这看着像是overlap了。

朱斯提提亚 · 发表于 2023-8-27 14:01:45

问题已经解决了，原因是tech lef里定义的最小间距与lef的不匹配，导致不能对齐

[求助] TSMC28 innovus DRC 求助

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