在线咨询
eetop公众号 创芯大讲堂 创芯人才网
切换到宽版

EETOP 创芯网论坛 (原名:电子顶级开发网)

手机号码,快捷登录

手机号码,快捷登录

找回密码

  登录   注册  

快捷导航
搜帖子
查看: 999|回复: 5

[资料] COMPACT MODELS FOR INTERGRATED CIRCUIT DESIGN

[复制链接]
发表于 2022-10-31 09:22:05 | 显示全部楼层 |阅读模式

马上注册,结交更多好友,享用更多功能,让你轻松玩转社区。

您需要 登录 才可以下载或查看,没有账号?注册

x
下面是简介啦,可以看一下是否需要


Chapter  1 provides an overview of compact transistor and interconnec-tion models, a brief history of compact MOSFET models, and the motiva-tion for compact models for very-large-scale-integrated (VLSI) circuit CAD. Chapter 2 reviews of basic semiconductor physics and pn-junction operations.
Chapter  3 presents MOS capacitor systems and the basic theory of two terminal devices. This chapter provides the background for developing four terminal MOSFET compact models for VLSI circuit CAD.
Chapter 4 describes the basic theory of long channel MOSFETs, including the Pao-Sah model, the charge-sheet model, and earlier generations of com-pact models. Chapter  5 provides detailed mathematical steps to derive the industry standard Berkeley Short Channel Insulated-Gate MOSFET version 4 (BSIM4) compact model. Chapter 5 also presents the parasitic models associ-ated with MOSFET devices, including source/drain diode compact models. Chapter  6 presents the dynamic behavior and compact MOSFET intrinsic capacitance model. Chapter 7 describes the compact MOSFET modeling tech-niques for noise and radio-frequency circuit CAD.
Chapter  8 is dedicated to compact models for process variability analy-sis. This chapter describes the sources of variability, circuit model for pro-cess variability, and formulation of statistical models for variability-aware VLSI circuit design. This chapter also presents the techniques for mitigating the risk of process variability in advanced nanoscale VLSI circuits by novel device and process architectures.
Chapter  9 describes the basic theory and compact model for multi-gate transistors FinFETs and UTB-SOI MOSFETs, along with model parameter extraction procedures. Chapter 10 introduces compact models beyond CMOS devices including TFET.
Chapter 11 presents BJT compact models. Similar to Chapters 4 and 5, in Chapter 11, the industry standard BJT models have been derived from basic semiconductor theory and first generation models for easy understanding by beginners while retaining the rigor for the experts in the field.
Chapter  12 includes examples of compact model libraries for industry standard circuit simulation tools, calling the model in the circuit simulation netlist (input file), and circuit simulation techniques to use the generated models.
An extensive set of references is provided at the end of this book to help the readers identify the evolution and development of compact models for VLSI circuit design and analysis.

COMPACT MODELS.pdf

15.03 MB, 下载次数: 63 , 下载积分: 资产 -5 信元, 下载支出 5 信元

发表于 2022-10-31 13:30:30 | 显示全部楼层
谢谢分享!
发表于 2022-10-31 13:43:46 | 显示全部楼层
thanks
发表于 2022-11-1 08:59:02 | 显示全部楼层
好书,感谢分享
发表于 2022-11-1 09:10:59 | 显示全部楼层
nice book, thanks
发表于 2022-11-23 01:31:54 | 显示全部楼层
Thanks for sharing!
您需要登录后才可以回帖 登录 | 注册

本版积分规则

关闭

站长推荐 上一条 /2 下一条


小黑屋| 手机版| 关于我们| 联系我们| 在线咨询| 隐私声明| EETOP 创芯网
( 京ICP备:10050787号 京公网安备:11010502037710 )

GMT+8, 2024-12-23 00:46 , Processed in 0.020908 second(s), 9 queries , Gzip On, Redis On.

eetop公众号 创芯大讲堂 创芯人才网
快速回复 返回顶部 返回列表