Towards efficient analog/mixed-signal testing

castlerock

Testing the analog components in modern mixed-signal systems has become a challenging task-it is reported that 70% of the overall design and test development time is devoted to the mixed-signal circuitry which accounts for less than 10% of the transistor counts. The major obstacles to efficient mixed-signal testing include (1) the need of expensive test equipment and long test time, and (2) the absence of tools for analog/mixed-signal test development. As a result, most research on testing mixed-signal systems concentrates on facilitating on-chip stimulus generation, response analysis, i.e., design for test (DfT) or built-in self-test (BIST), or the development of alternative tests, e.g., defect-oriented tests, in addition to traditional functional tests.;In this dissertation, we propose techniques aimed to enhance the efficiency of analog/mixed-signal testing. First, we address the test point selection problem for circuit board level fault diagnosis and present efficient graph-based test point selection algorithms. Not only the desired diagnosability is satisfied, but also the selected accessible sets are smaller than those manually selected by test engineers.;Secondly, we investigate efficient fault simulation techniques for analog/mixed-signal circuits. To enhance the fault simulation performance, we propose the specification back-propagation technique. Given an analog system building upon functional blocks, the technique allows one to derive the constraint associated with each functional block with respect to the system specification. A fault simulator base on the back-propagation technique is implemented, and simulation results show a speedup factor of 7.2 with 98% fault simulation accuracy.;Lastly, we study DfT/BIST approaches to relax the need of expensive automatic test equipment (ATE). Based on the delta-sigma modulation principle, we propose a general BIST structure that uses simple yet high tolerant mixed-signal circuitry for on-chip stimulus generation and response analysis. Then, we develop methods to efficiently characterize the 1-bit first-order delta-sigma modulator which is utilized as a BIST circuitry for on-chip data acquisition. The results of characterization are then used to compensate errors in test results caused by parametric variations of the delta-sigma modulator. Due to their frequent appearances in mixed-signal systems, we also propose efficient BIST schemes for testing on-chip analog-to-digital (AD) and digital-to-analog (DA) converters.

fanjx

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fanjx

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LAS.xs

kankan

piao

好东东

下载了先

piao

1999年的博士论文。老了一点。

alex_bai

miles

thanks a lot

sand_xiong

看看!!!!!!!!!1

d_level

下来看看，正在找的资料