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DC扫描电源电压信号，加上欠压锁存电路之后不收敛，提示如下：
The following set of suggestions might help you avoid convergence difficulties. After you have a solution, write it to a nodeset file by using the `write' parameter, and read it back in on subsequent simulations by using the `readns' parameter.
1. Evaluate and resolve any notice, warning, or error messages.
2. Perform sanity check on the parameter values by using the parameter range checker (use ``+param param-limits-file'' as a command line argument) and heed any warnings. Print the minimum and maximum parameter value by using `info' analysis. Ensure that the bounds given for instance, model, output, temperature-dependent, and operating-point (if possible) parameters are reasonable.
3. Check the direction of both independent and dependent current sources. Convergence problems might result if current sources are connected such that they force current backward through diodes.
4. Enable diagnostic messages by setting option `diagnose=detailed'.
5. Small floating resistors connected to high impedance nodes can cause convergence difficulties. Avoid very small floating resistors, particularly small parasitic resistors in semiconductors. Instead, use voltage sources or iprobes to measure current.
6. If you have an estimate of what the solution should be, use nodeset statements or a nodeset file, and set as many nodes as possible.
7. Use realistic device models. Check all component parameters, particularly nonlinear device model parameters, to ensure that they are reasonable.
8. If simulating a bipolar analog circuit, ensure that the region parameter on all transistors and diodes is set correctly.
9. Loosen tolerances, particularly absolute tolerances like `iabstol' (on options statement). If tolerances are set too tight, they might preclude convergence.
10. Increase the value of gmin (on options statement).
11. Use numeric pivoting in the sparse matrix factorization by setting `pivotdc=yes' (on options statement). Sometimes, it is also necessary to increase the pivot threshold to a value in the range of 0.1 to 0.5 by using `pivrel' (on options statement).
12. Try to simplify the nonlinear component models to avoid regions that might contribute to convergence problems in the model.
13. Divide the circuit into smaller pieces and simulate them individually. However, ensure that the results are close to what they would be if you had simulated the whole circuit. Use the results to generate nodesets for the whole circuit.
14. Check the connections to ground. Convergence problems might result if no connections to ground.
15. If all else fails, replace the DC analysis with a transient analysis and modify all the independent sources to start at zero and ramp to their DC values. Run transient analysis well beyond the time when all the sources have reached their final value (remember that transient analysis is very cheap when none of the signals in the circuit are changing) and write the final point to a nodeset file. To make transient analysis more efficient, set the integration method to backward Euler (`method=euler') and loosen the local truncation error criteria by increasing `lteratio', say to 50. Occasionally, this approach fails or is very slow because the circuit contains an oscillator. Often, for finding the dc solution, the oscillation can be eliminated for by setting the minimum capacitance from each node to ground (`cmin') to a large value.
请问《Designers-Guide to Spice and Spectre》书中提到的global option在Cadence IC 617版本中怎样打开，我没找到，求帮忙！
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eetop公众号
创芯大讲堂
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发表于 2021-9-9 17:14:53
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