jitter仿真的相关选项

xcy1214059777

目前我需要仿真芯片时钟路径上的抖动，目前仿真遇到几个问题，希望有大佬能给指点迷津
当我设置完pss后，现在要设置pnoise，这里面有timeavrage和sampled两个选项，这两个分别是仿什么的？有什么联系吗？

按我的理解，我想仿时钟路径（主要是一些inv，没有分频器）的抖动应该是选jitter，但是jitter里面又有三个选项：edge crossing、edge delay、sampled phase，这三个又对应的什么功能？这几天看了好久的help，还是没搞明白

YyuanRTs

图上这么设置是对的。不过我也想知道别的设置是怎么用的

xcy1214059777

Edge delay mode:

Allows both the trigger and the measurement tobe edges anywhere in the circuit. You can use the rising edge of a pulse as thetrigger and the falling edge of the same pulse to be the measurement, and thenyou will get the jitter on the pulse. You can also set the input to an inverteras the trigger and the output of the inverter as the measurement, in which caseyou will measure the jitter of the inverter.

Sampled phase mode:

This is like the old timedomainhbnoise. In this mode, you can specify a list of times in the hb timedomainwaveform and the noise measurements will be made at the specified times.

Edge crossing mode:

Allows a jitter measurement ata time specified by a threshold specification and rise or fall direction. Themeasurement can be made on that same net or at another net in the circuit. Thisis provided so the switch clock of a switched-capacitor circuit can specify thetime for a noise measurement at the output of the filter.

这是cadence中的关于三种仿真的解释，看了也理解不了，跪求哪个大哥能帮忙解释下？