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GNU网站上面介绍的RISC-V Options-mabi=ABI-stringSpecify integer and floating-point calling convention. ABI-string contains two parts: the size of integer types and the registers used for floating-point types. For example ‘-march=rv64ifd -mabi=lp64d’ means that ‘long’ and pointers are 64-bit (implicitly defining ‘int’ to be 32-bit), and that floating-point values up to 64 bits wide are passed in F registers. Contrast this with ‘-march=rv64ifd -mabi=lp64f’, which still allows the compiler to generate code that uses the F and D extensions but only allows floating-point values up to 32 bits long to be passed in registers; or ‘-march=rv64ifd -mabi=lp64’, in which no floating-point arguments will be passed in registers.The default for this argument is system dependent, users who want a specific calling convention should specify one explicitly. The valid calling conventions are: ‘ilp32’, ‘ilp32f’, ‘ilp32d’, ‘lp64’, ‘lp64f’, and ‘lp64d’. Some calling conventions are impossible to implement on some ISAs: for example, ‘-march=rv32if -mabi=ilp32d’ is invalid because the ABI requires 64-bit values be passed in F registers, but F registers are only 32 bits wide. There is also the ‘ilp32e’ ABI that can only be used with the ‘rv32e’ architecture. This ABI is not well specified at present, and is subject to change.
-march=ISA-stringGenerate code for given RISC-V ISA (e.g. ‘rv64im’). ISA strings must be lower-case. Examples include ‘rv64i’, ‘rv32g’, ‘rv32e’, and ‘rv32imaf’.When -march= is not specified, use the setting from -mcpu.If both -march and -mcpu= are not specified, the default for this argument is system dependent, users who want a specific architecture extensions should specify one explicitly.
具体含义Supported ABIs are ilp32 (32-bit soft-float), ilp32d (32-bit hard-float), ilp32f (32-bit with single-precision in registers and double in memory, niche use only), lp64 lp64f lp64d (same but with 64-bit long and pointers).
RISC-V has two integer ABIs and three floating-point ABIs, which can essentially be combined at will. Code generation is controlled by the -mabi argument to compiler calls, which concatenates the integer and floating point ABI name.Example: -mabi=ilp32dThe choice of ABI places requirements on the instruction set supported by the hardware and emitted by the compiler.
Integer ABIsilp32 - int, long, pointers are 32bit
- long long is 64bit
- char is 8bit
- short is 16bit ilp32 is currently only supported for 32-bit targets.
lp64 - int is 32bit
- long and pointers are 64bit
- long long is 64bit
- char is 8bit
- short is 16bit lp64 is only supported for 64-bit targets.
Floating Point ABIs”” (empty string) - No floating point arguments are passed in registers.
- No requirements on instruction set / hardware. f
- 32bit and smaller floating point types are passed in registers.
- Requires F type floating point registers and instructions. d
- 64bit and smaller floating point types are passed in registers.
- Requires D type floating point registers and instructions.
如何针对性地生成Multilib采用默认的配置,使能-enable-multilib,编译出来的可能不是我们需要的组合,需要手动进行配置。 可以通过修改gcc/config/riscv/t-elf-multilib文件,添加自己需要的组合,比如,我个人添加了rv32imfc/ilp32f(因为我不需要A指令集),则再次编译之后,可以生成对应的库。 MULTILIB_OPTIONS = march=rv32i/march=rv32ic/march=rv32im/march=rv32imc/march=rv32iac/march=rv32imac/march=rv32imafc/march=rv32imfc/march=rv32imafdc/march=rv32gc/march=rv64imac/march=rv64imafdc/march=rv64gc mabi=ilp32/mabi=ilp32f/mabi=lp64/mabi=lp64dMULTILIB_DIRNAMES = rv32i \rv32ic \rv32im \rv32imc \rv32iac \rv32imac \rv32imafc \rv32imfc \rv32imafdc \rv32gc \rv64imac \rv64imafdc \rv64gc ilp32 \ilp32f \lp64 \lp64dMULTILIB_REQUIRED = march=rv32i/mabi=ilp32 \march=rv32im/mabi=ilp32 \march=rv32iac/mabi=ilp32 \march=rv32imac/mabi=ilp32 \march=rv32imc/mabi=ilp32 \march=rv32imafc/mabi=ilp32f \march=rv32imfc/mabi=ilp32f \march=rv64imac/mabi=lp64 \march=rv64imafdc/mabi=lp64d
编译的结果如下: ab@haawking-pc1 MINGW64 ~/work/riscv-gnu-toolchain-58c9d86$ ../HX2000-Toolchain/riscv-tc-gcc-1123/bin/riscv64-unknown-elf-gcc.exe --print-multi-lib.;rv32i/ilp32;@march=rv32i@mabi=ilp32rv32im/ilp32;@march=rv32im@mabi=ilp32rv32imc/ilp32;@march=rv32imc@mabi=ilp32rv32iac/ilp32;@march=rv32iac@mabi=ilp32rv32imac/ilp32;@march=rv32imac@mabi=ilp32rv32imafc/ilp32f;@march=rv32imafc@mabi=ilp32frv32imfc/ilp32f;@march=rv32imfc@mabi=ilp32frv64imac/lp64;@march=rv64imac@mabi=lp64rv64imafdc/lp64d;@march=rv64imafdc@mabi=lp64d
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