Deep Submicron CMOS Circuit Design Simulator In Hands

lotusky

Deep Submicron CMOS Circuit Design Simulator In Hands - Etienne Sicard and Sonia Delmas Bendhia (723 pages)

Version December 2003

About Microwind and Dsch
The present book introduces the design and simulation of CMOS integrated circuits, and makes an extensive use of PC
tools Microwind2 and Dsch2. These tools are freeware.
The web link is http://www.microwind.org

Contents
Chapter Page
1 Introduction
Technology scale down
Frequency Improvement
Increased layers
Reduced power supply
2 The MOS device
The MOS Logic simulation of the MOS
MOS layout
Vertical aspect of the MOS
Static MOS characteristics
Dynamic MOS behavior
Analog simulation
Mos options
Transmission gate: the perfect switch
Layout considerations
3 MOS modeling
The MOS model 1
The MOS model 3
The model BSIM4
Temperature effects on the MOS
High frequency behavior of the MOS
4 The Inverter
The logic Inverter
The CMOS inverter (Power, supply, frequency)
Layout design (plasma, latchup)
Simulation of the inverter
Views of the process
Buffer
3-state inverter
Analog behavior of the inverter
Ring oscillator
Temperature effects
5 Interconnects
Signal propagation
Capacitance load
Resistance effect
Inductance effect
Buffers
Clock tree
Supply routing
6 Basic Gates
Introduction
From boolean expression to layout
NAND gate (micron, sub-micron)
OR3 gate
XOR
Complex gates
Multiplexors (Mux-demux)
Pulse generator
7 Arithmetics
Data formats: unsigned, signed fixed
Half adder gate
Full adder gate
4-bit adder
Comparator
Multiplier
ALU
Low power arithmetics
8 Latches
RS latch
D-Latch
Edge-trigged latch
Latch optimization (conso, speed, fanout)
Counter
Project: programmable pulse generator
9 FPGA
Goals
Mux for FPGA
Configurable logic block
Look-up table
Interconnection
Programmable Interconnection Points
Propagation delay
10 MEMORIES
The world of Memories
Static RAM memory (4T, 6T)
Decoder (low power)
Dynamic RAM memory
Embedded RAM
Sense ampli
ROM memory
EEPROM memory
FRAM memory
11 Analog Cells
Diode connected MOS
Voltage reference
Current Mirror
Amplifiers (Class)
Voltage regulator
Wide range amplifier
Charge pump
Noise
12 RF Analog Cells
Osc illators
Inductors
Sample & Hold
Mixers
Voltage-controlled Oscillators
PLL project
Power amplifiers
13 Converters
Introduction
Converter parameters
Sample hold
ADC
DAC
14 Input/Output Interfacing
Level shifter
Pad stucture
Input pad (schmidt, protect, buffer)
Output pad (log, analog, multi drive)
Pad ring
Packages
IBIS
LVDS
High performance Ios
15 SOI
Layout improvements
2D aspects
SOI model
Simulation
Issues
16 Future & Conclusion
Appendix A Design rules
Appendix B List of commands Microwind
Appendix C List of commands Dsch
Appendix D Quick Reference Sheet Microwind-Dsch
Appendix E CMOS technology reference Sheet
0.8μm
0.6μm
0.35μm
0.25μm
0.18μm
0.12μm
90nm
Appendix F Answer to exercises

[ 本帖最后由 lotusky 于 2007-11-27 00:39 编辑 ]

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