版图职位招聘北京上海成都

daisyyang

国内AI研发公司版图职位招聘，工作地点：北京、上海、成都。有兴趣欢迎联系我了解详情，微信 yy17cc，邮箱 daisy@hibohr.com

Layout Design Engineer

Position Overview:

1.Planning and leading layout projects.

2.Responsible for Block level/top level layout implementation meeting design constraints.

3.Responsible for Tapeout, DRC/LVS/ANT.

4.Candidate will be responsible for analog layout design of advanced semiconductor technologies, such as 16nm, 7nm and beyond. This role requires a close working

5.Relationship with circuit design engineers to develop layout that push the boundaries of technology and physics in order to deliver best products in Digital Encrypted Currency and Artificial Intelligence area.
Desired Skills and Experience:

1.At least 5 years analog and mix-signal layout experience.

2.Experience on 16nm/7nm analog layout design and optimization.

3.Good understanding of CMOS and FinFet technologies (device physics, deep sub-micron effects and layout effects)

4.Good understanding of Analog Layout fundamentals (e.g. Matching, Electro-migration, Latch-up, coupling, cross-talk, IR-drop, active and passive parasitic devices etc.)

5.Proficient in EDA tools used for layout design (e.g. Virtuoso/OA for layout design L/XL/GXL, Calibre for DRC/LVS/DFM, StarRC/QRC for Extraction, tools for Electro-migration and IR Drop analysis)

6.Cripting language (SKILL/Perl/TCL) proficiency is also desirable.