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Senior/Staff RTL Verification Engineer (Security/IOT) Job Description: You will contribute to the specification, microarchitecture of high performance, energy efficient IP solution. Your responsibilities will be related, but not limited to, IP development applied to IoT and Security areas You will be responsible for Developing Test Bench with, but not limited to, System verilog , UVM. Develop and implement Verification Plan , test cases and functional coverage/assertion based on IP features, (e.g. methodologies/framework, bus functional models, regression tests) Build Verification Environment using script Makefile/Perl/Python Qualifications needed: Education: Bachelors or Master’s degree in EE, CE or CS, or equivalent, with 5+ years of digital verification experience Good experience on Building Test bench on IP or System level with System Verilog and UVM is required Very good understanding on Verilog, System Verilog, Verification Methodology Good communication skills, strong interpersonal skills and the flexibility Good understanding on AMBA Experience in following will be a plus: Good understanding of arm based IP or SoC designs and system architecture. Knowledge of IoT or Security areas. Rich background on UVM Experience on AMBA VIP Experience on RTL design of security IP Experience on SOC level verification, C/C++
Senior/staff RTL Design Engineer As a RTL Design Engineer, you will contribute to the specification, microarchitecture and RTL design of high performance, energy efficient IP solution. Your responsibilities will be related, but not limited to · IP development applied to IoT and Security areas. · RTL logic design, debug and Verification (e.g. IP/methodologies/framework, bus functional models, regression tests) · System design and verification · Working closely with performance modelling, validation and implementation teams to meet functional requirements, performance, power and area goals · New product release or roll out support · Customer technical support Qualifications needed: · Education: Bachelors or Master’s degree in EE, CE or CS, or equivalent, with 5+ years of digital design experience. · Familiarity or experience in RTL design with Verilog and/or V hdl is required. · Designing for synthesis targeted to achieve specified power, frequency, and area targets · AMBA based system design and verification · Able to consider impact on verification complexity of design decisions Experience in following will be a plus · High-performance, low-latency execution, high area-efficient and power-efficient logic design. · A good understanding of ARM based IP or SoC designs and system architecture. · Knowledge of IoT and/or Security areas. Personal Skills We are proud to have a set of behaviors that reflect our unique culture and guide our decisions, defining how we work together. · Strong desire to delivery result and win business. · Positive, “can do” attitude. · Self-motivated, dependable, and prompt. · Flexible, willing to adapt to changing responsibilities and assignments. · Good communicator, personable. · Capable of working as a team player. · Ethical, honest, and trustworthy.
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