一个2级cmos Op的笔试问题

noves

回复 9# chenxiliang


   找到了，谢谢

noves

回复 10# king0798


   M10不会截止的，栅电压为电源电压。原因还是输出高电平时M10电阻变小，以及M6跨阻变小导致RHP零点频率下降，使得相位裕度下降了

king0798

回复 12# noves


   是，没注意电压

磐磬

回复 7# noves


   我觉得是这样的

xiaoyisimonguo

回复 14# 磐磬


   which one, A, B, C or D?

122013137

回复 12# noves


  输出电压变高时,NMOS的VGS下降，等效电阻变大才是

彭盛輝

When the output swings high, the voltage at the source of M10 goes low assuming the
compensation capacitor tends to get short-circuited. Thus, (VDD −VS10 −VT10 ) increases
causing a decrease in the value of RZ . Also, as the voltage at the gate of M6 goes down,
the current in M6 decreases causing a decrease in value of gm 6. Referring to Z1=1/(1/gm6-Rz)Cc, a
decrease in both RZ and gm 6 would tend to place the zero in the right half plane and it
would degrade the phase margin causing the op amp to oscillate.
b.) When the output swings low, the voltage at the gate of M6 and the source of M10 goes
up. This decreases (VDD −VS10 −VT10 ) causing an increase in RZ . Also, as the voltage at the
gate of M6 increases, the current through M6 increases causing and increase in gm 6. Thus,
from Z1=1/(1/gm6-Rz)Cc, an increase in RZ and gm 6 would create a LHP zero which would make
the op amp more stable.
Increase gm6=> create LHP zero

122013137

When the output swings high, the voltage at the source of M10 goes low assuming the
compensation ca ...
彭盛輝 发表于 2017-9-11 15:47

                               
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  讨论一下，基于这个BUFFER，输入0V的情况 和 输入1.5V的直流电平的情况 ，2个相位裕度如何？

noves

回复 16# 122013137


       M10源端应该是接电容那端，M6的栅与M10源端同向，输出高电平表示M10源端电位最低

122013137

回复 19# noves


   对输入直流的情况，M10的电流为0，也就是VS10=VD10=VOUT，这时没有所谓的哪边高哪边低