北京上海验证，前端，数字后端职位

d5639011

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Logic Verification Engineer/Manager 北京、上海

Requirements:

1. ME/EE/CS orbackground in related areas.

2. Research and/ordevelopment experience in one or more of the following areas:

·
Logic verificationon the basis of the target system specification

·
Mixed-signalmodel verification on advanced technologies

·
Proficiencyin programming and/or scripting languages is a plus

·
Knowledge onProtocols, High Speed Serdes or DDR is a plus

3. Experience in oneor more of the following application domains, is a plus

·
Highperformance computing system, processor, chipset and ASICs

·
High end communication,networking, mobileand data center applications

·
Digitalsignal processing, sensor and Internet of Things

·
Otheremerging IT technology and industry areas

4. Good English skills,communication skills, and willingness to work with a global team. Skill inother languages is a plus.

5. Good learningcompetency, self-motivated, and ability to work in diverse areas in a flexible anddynamic environment.

IC前端工程师 北京

Responsibility:

完成芯片的前端设计和实现的整个流程；

包括开发RTL代码，负责芯片/子系统级综合、形式验证、静态时序分析，综合网表交付；

协同前后端完成时序收敛，撰写设计文档。

Qualification:

熟练掌握Verilog，熟悉前端设计与综合实现的流程；

熟练使用EDA设计工具，如DC/PT/Formality/SpyGlass/VCS/Verdi等；

了解芯片低功耗设计流程，如UPF设计流程；

具备一定的perl/shell/tcl脚本编程能力；

良好英文文献阅读能力。

Position: Principle Physical Design Engineer

上海

Keyresponsibilities/duties:

Principle physical design engineer is expected towork on physical implementation in top level or block level in leading edgehigh performance large scale Asic product in advanced node. Focus on physicalimplementation including

1.
Floorplan/Timing Driven placement & Route

2.
Clock Tree Synthesis

3.
Timing Analysis & closure

4.
Power Analysis

5.
DRC&LVS

Requirements(indicate “must” or “preferred”)

Keyskills & knowledge:

1.
BS/MS in electrical/computer engineering andrelated.

2.
3+ years MS or 5+ years BS

3.
Hands on experience in large scale ASIC chipphysical design

4.
Good understanding of IO Frame and PV

5.
Familiar with back-end EDA tools

6.
Good script skills required (TCL, perl, unix shelletc.)

7.
Good Communication skill with customer andinternational supporter.

8.
Dedicated, hard working and good team player.

9.
Successfully gone through several completedevelopment cycles

10.
Top level Timing closure experience in advance node as 28nm/14nm is aplus.

联系我 手机微信同步15221246509