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发表于 2017-5-15 09:16:33
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Digital front-end designer 不只是verilog,以下是我的觀點
1. 電子電路,組合邏輯的了解
2. HDL - Verilog or VHDL 的熟練 and "thinking in hardware".
3. Perl / TCL script.
4. UNIX c-shell, sed, awk.
5. C / C++
6. Timing concept.
7. EDA tool
a. Simulator - Modelsim, VCS, NC-verilog
b. Debugger - Verdi, nLint
c. Synthesis - DesignCompiler, RTL Compiler
d. STA - PrimeTime, ETS
Nice to have
e. equivalence-checking - Conformal , Formality.
配合上自己的專業,例如Network, Video/Image, USB or SATA link layer
應該可以成為不錯的Digital Front-end engineer.
互勉之 |
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