【Cadence 上海+深圳】招Principal Hardware Based Design and Verification Engineer

kengteng

投递方式：

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Sr. Staff /Principal Hardware Based Design and Verification Engineering

Location: 上海&深圳


Position Description:

He/she will lead and be a participating member of a team of advanced field engineers who deploy and support advanced hardware based verification flow integration technical engagements and provide easy-to-adopt packages and workshops to Cadence field application engineers and customers alike.

He/she will focus on the technical aspects of the following hardware verification solutions for customer engagements as well as creating demos/workshops to train field AE and customers:
(1) Cadence Palladium HW Acceleration Platforms
(2) Cadence Acceleratable Verification IP portfolio
(3) HSV product integration with other Cadence products such as Incisive Simulation and/or Joules for power analysis
(4) HW/SW Co-verification solutions for SoC designs

The person must be a strong team leader and contributor, leading projects and initiatives for the local regions and maintain a strong connection with the US team. He/She must be able to travel and coach AEs among AP regions for multiple engagements.

HW based verification experience such as other emulators or FPGA prototyping based verification is required.

Expertise in RTL top-down design and verification methodology automation are required. This includes full hands on knowledge of writing and debugging Verilog, VHDL and SystemVerilog based D&V environments.

We would also like the candidate to have good knowledge of SoC design principles, embedded software development and HW/SW co-design and co-verification.

The person should possess team-success orientation, mature work attitude, and good judgment under pressure.


Position Requirements:

1. Minimum Education Required: education level of BS with 12+years’ experience (or MS with 10+ or more years’ experience).
2. A good knowledge of RTL design and verification tools(HDLs, synthesis tools, design simulation, acceleration using emulators).
3. Knowledge of the needs of SoC design and verification.
4. Knowledge of UNIX, C/C++, other scripting programming languages (Perl, TCL…) is highly desired.
5. Strong verbal and written communication skills in English are required.
6. At least 12+ years’ experience in the following areas:
- HW acceleration or In-Circuit Emulation or FPGA prototyping experience is a must.
- Hardware verification, including knowledge of HDL simulators and debugging simulations.
- Hands on experience with using design and verification languages like SystemC, SystemVerilog (IEEE 1800) and VHDL is a must.
- Knowledge of embedded systems and software development for SoCs is a plus.