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发表于 2021-4-21 10:53:55
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Whenever a Synopsys tool replaces a group of single-bit registers with a multibit register, or
replaces a multibit register with single-bit registers, it records the changes in an .svf file. This
file provides guidance to the Formality formal verification tool, allowing it to verify the
equivalence of the single-bit and multibit replacement logic. This is true for all tools that
perform multibit register banking: Design Compiler, DFT Compiler, Power Compiler, and IC
Compiler. |
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