Analog Job Opening （Beijing）

yuaries

Job Title: Senior/Stafff Analog Design Engineer

Job allocation: Beijing

Job Description:

(1) Design and optimize SerDes analog circuit with advanced CMOS process on consumer electrical and industry.
(2) Take responsibility on block and chip level with innovation and high performance like VCO, CDR, Driver, DFE, CTLE …
(3) Team co-operate and participate in architecture, circuit implementation, layout guideline and silicon validation.
(4) Applied for patents with new idea.

Qualifications:

(1) MSEE/MSME/Ph.D with high speed circuit research two/three years working experience
(2)  Solid knowledge and potential circuit development on semiconductor and devices
(3)  High speed CMOS circuit design experience in SERDES
(4)  Familiar with Spectre/Hspice/Finesim on simulation and Cadence Virtuoso
(5)  Experience on characterization test, EM modeling with HFSS, Verilog-A, matlab set up model
(6)  Good communication with English both written and oral

Please send CV to the following email: lifeyu@163.com