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【NVIDIA社招】英伟达上海热招ASIC Physical Design engineer 一.公司简介 NVIDIA (英伟达™)(www.nvidia.cn)公司(纳斯达克代码:NVDA)是全球视觉计算技术的行业领袖及GPU(图形处理器)的发明者。作为高性能处理器的GPU可在工作站、个人计算机、游戏机和移动设备上生成令人叹为观止的互动图形效果。公司在全球拥有超过8000名员工,总部在加利福尼亚州圣克拉拉。 工作地址:上海研发中心【上海申江路5709号(秋月路26号)矽岸国际2号楼】
二.投递方式 感兴趣请的请将简历发送至:yvettes@nvidia.com;邮件注明“BBS” 我们会认真对待每份简历,保证每份简历都有是否通过简历筛选的回复。同时欢迎随时电话或邮件咨询职位详情,申请进度等等:021-61043660
三.职位详情 ASIC Physical Design engineer As a senior member of our ASIC-PD team, you'll be workingon streamlining the chip infrastructure process across product designs,focusing on full chip layout planning (partitioning, planning clockdistribution and other structure, methodology), partition/full chip timingclosure (primetime scripts, other tools, etc) and gate-level design ofhigh-speed logic
RESPONSIBILITIES:
-Chip integration and netlist generation -Synthesis, Formal verification, netlist quality check -Work in conjunction with Place and Route Engineers toachieve timing closure for both partition level and full chip level -Develop and enhance entire timing flow from frontend(pre-layout) to backend (post-layout) at both chip and block level. -Develop custom timing scripts using tcl/primetime forclock skew analysis, special circuits such as clock dividers, core logic<-> IO macros interfaces such as PCI-E, Frame-Buffer/Memory, TMDS, etc. -Develop flow to physically partition and floorplan theentire chip. -Develop scripts for performing ECO's. MINIMUM REQUIREMENTS: - BS or MS in Electrical Engineering or Computer Science - relevant ASIC experience ideally with a focus in thechip integration /synthesis/formal and timing closure - Excellent scripts skills - Excellent written and verbal communication skills inEnglish - Ability to multiplex many issues, set priorities, andwork in a team environment - Keep up to date with leading edge technologies
BestRegards, YvetteShen APACStaffing Team NVIDIASHANGHAI Building 2, No. 5709 Shenjiang Road(No.26 Qiuyue Road) 201210. Tel+(86 21) 61043660 yvettes@nvidia.com |